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Sr.Layout Design Engineer

6 months ago

bangalore, India Global Pharma Tek Full time
Job Overview: As a Senior Layout Engineer specializing in Analog/RF at Aura Semiconductor, you will play a pivotal role in the physical design and verification of custom Analog/RF mixed-signal integrated circuits. Your responsibilities will encompass IC mask layout design, physical verification, and collaboration with cross-functional teams to ensure the successful development of high-quality semiconductor products. Join our dynamic team and contribute to cutting-edge advancements in Analog and RF technologies
The candidate should have worked on higher nodes nm/nm & above We DO NOT need candidates who have worked on lower nodes like nm/nm/nm etc Exp level can start from - yrs of exp No of positions – We prefer candidates from Tier Semiconductor companies only (TI, ADI, NXP, MXL, Qualcomm, Client, Samsung, Marvel & few others etc) Please do not send resumes from contractors/Tier services companies Budget can start from -Lacs to offer & can be on the case to case basis for the exp level Please send only Resume per mail with the candidate's name – current company – yrs of exp in the subject line (which will make it easy to coordinate the feedback) Please check the candidate's CTC details & the reason for quitting (a short summary in the body of the email along with the resume) If the candidate is holding an offer & still looking for a better offer we need reason for why not accepting the received offer (such guys will be last in consideration) The first round may be a Zoom call & the next step would be coming to the FF discussions at the Aura office We are on days WFO mode Please coordinate on WA than calls for a speedy response.
Key Responsibilities:
• Perform IC mask layout design and physical verification for custom Analog/RF mixed signal, IO & ESD designs at the Block/Module level.
• Execute and oversee layout activities, including LVS/DRC/antenna checks, for complex mixed signal integrated circuits.
• Collaborate closely with circuit designers and CAD engineers to create and optimize custom Analog mixed-signal blocks layout.
• Ensure adherence to established companywide layout design & CAD methodologies and process flows.
• Lead and manage a team of - professionals, providing guidance and support as necessary, and contribute individually when required.
• Identify and resolve issues related to failure-prone circuit and layout structures, working in tandem with circuit designers to find optimal solutions.
• The candidate should have worked on higher nodes nm/nm & above
• We DO NOT need candidates who have worked on lower nodes like nm/nm/nm etc
Essential Requirements:
• Bachelor's degree in a technology-related field with a minimum of years - + years of relevant experience in layout engineering for Analog/RF domains. Candidates from premier institutes are preferred for all experience levels.
• Proficiency in Transistor level floor planning within a multi-voltage, mixed-signal, high-speed, and noise-sensitive environment.
• Extensive experience with tools such as Cadence Virtuoso-XL, Virtuoso-L, Mentor Graphic Calibre, Cadence Assura/PVS, and Linux Operating System.
• Strong expertise in interpreting and addressing caliber/Assura DRC, LVS, ERC, antenna, and post-layout extraction issues.
• In-depth knowledge of Analog layout techniques, CMOS fabrication concepts, and processes.
• Excellent communication skills, both verbal and written, with proficiency in creating documents using Microsoft Office and Microsoft PowerPoint.
• Familiarity with Latch-up prevention, ESD protection schemes, and an understanding of issues related to RC delay, electromigration, and cross-capacitance.
• Proficiency in skill, Perl, C-shell, and TCL programming for automating repeatable layout tasks, and the ability to drive methodology improvements for increased productivity.
​​​​​​​• Demonstrated ability to customize and optimize rule decks for calibre/Assura DRC/LVS/antenna, driving methodology improvements in layout for productivity enhancements.