SoC Debug and interconnect Design Lead/Methodology

1 week ago

Bengaluru, India ConnectPro Consultant Full time
Debug and interconnect Design Lead/Methodology

Job

Summary

SoC Debug is very crucial in chip design as it helps identify and resolve issues that

can arise during the development and post silicon testing. Effective and consistent SoC Debug infrastructure ensures the functionality, performance, and reliability of the chip. It helps in pinpointing and fixing errors, optimizing power consumption, and enhancing overall system integration. SoC debug plays a vital role in delivering high-quality, reliable, SoCs to our customers in reducing the time to market.

This position will requireDeep understanding of

SoC debug aspects ARM debug infrastructure (including CoreSight infrastructure, SoC Cross Trigger Matrix, JTAG-based debug implementation and/or validation)Understand interconnect protocols like AHB/AXI/ACE/ACE-Lite/NoC concepts.Familiarity with 3 rd

Party tools like Arteris FlexNoC, ARM Socrates etcDevelop executable architecture specifications, automate the flow from definition to design delivery.Proficiency in scripting languages like PERL/Python is requiredAble to define and create a methodology, automation frame work for debug in all SoCsCollaborate with other SoC Architecture teams/Software/FE teams and drive co-design and collaboration on features set.Post-Silicon production support with silicon debugIndustry standards tracking & 3rd party IP technical evaluation.Well versed with Knowledge of SoC clocking and reset mechanisms would also be advantageousKey Challenges:Experience in designing or architecting complex SoCs in leading-edge process nodes with multiple independent compute environmentsExposure to ISO26262-compliant and mixed-criticality architecturesAbility to work at the system level, identifying optimal partitioning of solutions between hardware and software, working closely with software architectsTrack record of assessing performance, power, and area tradeoffs and determining the correct balance for a given product typeExperience in defining IP components to solve system issues.High motivation and results orientationStrong problem-solving skillsExcellent interpersonal skills, including written and verbal communicationTeamwork, negotiation, and presentation skillsWilling and able to mentor junior engineers

Job Qualifications:BTech/MTech/Ph.D. in Electrical/Computer Engineering or other similar disciplines with at least 8 years of relevant experience.Understand interconnect protocols like AHB/AXI/ACE/ACE-Lite/NoC concepts.Good knowledge of Digital Design and RTL development - Hands-on experience with SoC Design, Verilog RTL codingUnderstanding of multi-core ARMv8/v9 CPU architecture, coherency protocols, and virtualizationWorking knowledge of Synthesis, DFT, verification, and silicon debug.Working knowledge of Lint, CDC, PLDRC, CLP, etcBasic Knowledge of System ArchitectureFamiliarly with system design, SOC micro-architecture, and/or design

Job locations: BengaluruWe are 26 years old company catering to top notch companies catering to Semicon Industries, Telecom and System Software.We are operating out of Delhi, Bengaluru and Hyderabad.

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