Design Lead

1 week ago


Bengaluru, Karnataka, India ConnectPro Management Consultants Pvt Ltd. Full time
Debug and interconnect Design Lead/Methodology.

Job Summary.

  • SoC Debug is very crucial in chip design as it helps identify and resolve issues that can arise during the development and post silicon testing.
  • Effective and consistent SoC Debug infrastructure ensures the functionality, performance, and reliability of the chip.
  • It helps in pinpointing and fixing errors, optimizing power consumption, and enhancing overall system integration.
  • SoC debug plays a vital role in delivering highquality, reliable, SoCs to our customers in reducing the time to market.
  • This position will require Deep understanding of SoC debug aspects ARM debug infrastructure (including CoreSight infrastructure, SoC Cross Trigger Matrix, JTAGbased debug implementation and/or validation).
  • Understand interconnect protocols like AHB/AXI/ACE/ACE-Lite/NoC concepts.
  • Familiarity with 3rd Party tools like Arteris FlexNoC, ARM Socrates etc.
  • Develop executable architecture specifications, automate the flow from definition to design delivery.
  • Proficiency in scripting languages like PERL/Python is required.
  • Able to define and create a methodology, automation frame work for debug in all SoCs.
  • Collaborate with other SoC Architecture teams/Software/FE teams and drive codesign and collaboration on features set.
Post-Silicon production support with silicon debug.

  • Industry standards tracking & 3rd party IP technical evaluation.
  • Well versed with Knowledge of SoC clocking and reset mechanisms would also be advantageous.

Key Challenges :

  • Experience in designing or architecting complex SoCs in leadingedge process nodes with multiple independent compute environments.
  • Exposure to ISO26262compliant and mixedcriticality architectures.
  • Ability to work at the system level, identifying optimal partitioning of solutions between hardware and software, working closely with software architects.
  • Track record of assessing performance, power, and area tradeoffs and determining the correct balance for a given product type.
  • Experience in defining IP components to solve system issues.
  • High motivation and results orientation.
  • Strong problemsolving skills.
  • Excellent interpersonal skills, including written and verbal communication.
  • Teamwork, negotiation, and presentation skills.
  • Willing and able to mentor junior engineers.
Job Qualifications.

- Electrical/Computer Engineering or other similar disciplines with at least 8 years of relevant experience.

  • Understand interconnect protocols like AHB/AXI/ACE/ACE-Lite/NoC concepts.
  • Good knowledge of Digital Design and RTL development Handson experience with SoC Design, Verilog RTL coding.
  • Understanding of multicore ARMv8/v9 CPU architecture, coherency protocols, and virtualization.
  • Working knowledge of Synthesis, DFT, verification, and silicon debug.
  • Working knowledge of Lint, CDC, PLDRC, CLP, etc.
  • Basic Knowledge of System Architecture.
  • Familiarly with system design, SOC microarchitecture, and/or design.

Job locations :
Bengaluru.

  • We are 26 years old company catering to top notch companies catering to Semicon Industries, Telecom and System Software.
  • We are operating out of Delhi, Bengaluru and Hyderabad.
Exp 8 to 12 years.

Location- Bangalore Urban, Karnataka, India
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