Design Verification Leads

· 6+ years of experience in ASIC/SOC/IP Verification using SystemVerilog and UVM/OVM methodologies.· Hands-on in testbench development, coverage closure, and debugging using VCS/Xcelium/Questa.· Strong in protocol verification — DDR, PCIe, USB, SATA, MIPI, Ethernet.· Exposure to CPU-based SoC Verification, including ARM/RISC-V environments and cache...

· 6+ years of experience in ASIC/SOC/IP Verification using SystemVerilog and UVM/OVM methodologies. · Hands-on in testbench development, coverage closure, and debugging using VCS/Xcelium/Questa. · Strong in protocol verification — DDR, PCIe, USB, SATA, MIPI, Ethernet. · Exposure to CPU-based SoC Verification, including ARM/RISC-V environments and cache...

·6+ years of experiencein ASIC/SOC/IP Verification usingSystemVerilogandUVM/OVMmethodologies.· Hands-on intestbench development, coverage closure, and debuggingusing VCS/Xcelium/Questa.· Strong inprotocol verification— DDR, PCIe, USB, SATA, MIPI, Ethernet.· Exposure toCPU-based SoC Verification, including ARM/RISC-V environments and cache coherency.·...

We’re Hiring – Lead Design Verification Engineer @ Eximietas Design! Position: Lead Design Verification Engineer Experience: 7+ Years Locations: Bangalore / Ahmedabad / Pune / Hyderabad Key Skills: Proven experience in Design Verification using SystemVerilog and UVM Strong experience in minimum 2 protocols like AXI, AHB, Ethernet, PCIe, UCIe, DDR, USB,...

We’re Hiring – Lead Design Verification Engineer @ Eximietas Design! Position: Lead Design Verification Engineer Experience: 7+ Years Locations: Bangalore / Ahmedabad / Pune / Hyderabad Key Skills: - Proven experience in Design Verification using SystemVerilog and UVM - Strong experience in minimum 2 protocols like AXI, AHB, Ethernet, PCIe, UCIe, DDR,...

We’re Hiring – Lead Design Verification Engineer @ Eximietas Design! Position: Lead Design Verification EngineerExperience: 7+ YearsLocations: Bangalore / Ahmedabad / Pune / HyderabadKey Skills:Proven experience in Design Verification using SystemVerilog and UVMStrong experience in minimum 2 protocols like AXI, AHB, Ethernet, PCIe, UCIe, DDR, USB, NVMe,...

Lead verification Bangalore About company Ventana delivers the highest performance RISC-V CPUs with extensible instruction set capability delivered in the form of multi-core chiplets or core IP for high-performance applications in the cloud, enterprise data center, hyperscaler, 5G, edge compute, AI/ML and automotive markets.The well-funded start-up, founded...

Lead verification Bangalore About company Ventana delivers the highest performance RISC-V CPUs with extensible instruction set capability delivered in the form of multi-core chiplets or core IP for high-performance applications in the cloud, enterprise data center, hyperscaler, 5G, edge compute, AI/ML and automotive markets.The well-funded start-up, founded...

Lead verification BangaloreAbout companyVentana delivers the highest performance RISC-V CPUs with extensible instruction set capability delivered in the form of multi-core chiplets or core IP for high-performance applications in the cloud, enterprise data center, hyperscaler, 5G, edge compute, AI/ML and automotive markets.The well-funded start-up, founded by...

TITLE: Lead DESIGN VERIFICATION ENGINEERLocation: Greater Bengaluru AreaGLOBAL MNC:Our main business focuses on automotive microcontrollers and SoCs. The solutions cover a wide range, such as Edge-ECU to ADAS applications, dedicated to creating a comprehensive solution for automotive chips.It will continue to integrate the latest electronic and electrical...