
Design Verification Engineer- SOC
3 weeks ago
Job title: Design Verification Engineer - SOC
Work Experience: 7 to 15 years
Rate: 200,000 / monthly
Location: Bengaluru, Karnataka
Skills Required:
- UVM
- SOC
- Verification
- OVM
- SV
- System verilog
Cadence
7+ years of relevant experience in verification – preferable SoC level
- Good knowledge on ARM – M core operations and able to write code in C for ARM processor
- Expert in UVM bench – able to adapt quickly to existing bench and start creating test cases
- Experience in using Cadence and Synopsys VIP
- Debugging test case using disassembly and tarmac for ARM cores
- AHB and APB interface protocol
- Expert level knowledge in DMA / Interrupt handling / Cache / interconnect
- Good debugging skills at SoC level using tarmac / waveform – UVM bench debug
- Experience in working with cadence simulator and simvision
- Experience in peripherals SPI / I2C / I3C / CAN and LIN is a plus
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