Senior staff verification engineer
1 month ago
The role will own
verification of one or more IP blocks
at IP-level and leading to chip-level for
USB and automotive applications
.· The role will be responsible for
Test bench Architecture, Test planning ,Test Development and Verification
for IP Blocks and Subsystems.· The role will work on
verification closure
, including test plan, coverage and assertion closure· The role will Interact with other functional leads from Design, DFT and FW/SW Teams· The role will evaluate new tools & methodologies required for continuous improvement of design flows· Guide & Mentor junior engineers working on IP BlocksYou are best equipped for this task if you have:
· Bachelors/Masters in Electrical/Electronics Engineering with 7-10 years of experience· Thorough understanding of
System Verilog & UVM framework for IP Verification· Thorough understanding of Coverage Driven Verification· Experience with Assertion Development & AB· Experience with Power Aware Verification· Experience in verification of designs in RTL & GLS· Experience in maintaining verification architecture for platforms· Experience of leading a team for IP-level verification
Interested candidates can send resumes
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