AMS Verification engineer
1 week ago
JD/Requirements:
Responsibilities
- Execute assigned testcases according to verification plan and debug issues if any
- Extract and validate SVRNM models of analog blocks
- Code testcases in adice or UVM environment for different sections like functional, test mode etc
- Interact with designers/other groups throughout the phase of verification
- File and track bugs to closure in Jira
- Document results of assigned blocks and participate in reviews
Qualification
- Completed university degree in electronics engineering or comparable degree
- 5+ experience in chip level AMS verification of SOC
- Ability to independently debug issues
- Experience with mixed signal simulators
- Experience with Analog behavioural model coding with SVRNM
- Experience with GLS and scan sims from top level is preferred
- Basic understanding of SV assertions is preferred
- Team player with good analyzing and debugging skills
- Experience with ADI tools like adsim, adice etc will be an added advantage
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AMS Verification Engineer
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