RTL Design
2 months ago
We are currently seeking experienced RTL Engineers
- Minimum 4 years of experience required
- Proficiency in RTL development from micro-architecture
- Expertise in SoC, Memory, Peripheral, Security, and Cache IP’s Analysis & Integration
- Skilled in RTL Quality checks including VCS, synthesis checks, LINT, LEC, CDC
- Strong background in Failures Debug/Bug fixes on RTL and Netlist
- Experience in low-level design document generation, implementation & review
- Knowledge of ARM Cortex based system understanding & Integration
Join our dynamic team to collaborate on cutting-edge projects and contribute to innovative solutions in semiconductor design
Interested candidates, please share your resume with
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RTL Design
1 month ago
hyderabad, India BITSILICA Full timeWe are currently seeking experienced RTL Engineers - Minimum 4 years of experience required - Proficiency in RTL development from micro-architecture - Expertise in SoC, Memory, Peripheral, Security, and Cache IP’s Analysis & Integration - Skilled in RTL Quality checks including VCS, synthesis checks, LINT, LEC, CDC - Strong background in Failures...
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Rtl design
2 months ago
Hyderabad, India BITSILICA Full timeWe are currently seeking experienced RTL Engineers - Minimum 4 years of experience required - Proficiency in RTL development from micro-architecture - Expertise in So C, Memory, Peripheral, Security, and Cache IP’s Analysis & Integration - Skilled in RTL Quality checks including VCS, synthesis checks, LINT, LEC, CDC - Strong background in Failures...
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RTL Design
1 month ago
hyderabad, India BITSILICA Full timeWe are currently seeking experienced RTL Engineers- Minimum 4 years of experience required- Proficiency in RTL development from micro-architecture- Expertise in SoC, Memory, Peripheral, Security, and Cache IP’s Analysis & Integration- Skilled in RTL Quality checks including VCS, synthesis checks, LINT, LEC, CDC- Strong background in Failures Debug/Bug...
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RTL Design
2 months ago
Hyderabad, India BITSILICA Full timeWe are currently seeking experienced RTL Engineers- Minimum 4 years of experience required- Proficiency in RTL development from micro-architecture- Expertise in SoC, Memory, Peripheral, Security, and Cache IP’s Analysis & Integration- Skilled in RTL Quality checks including VCS, synthesis checks, LINT, LEC, CDC- Strong background in Failures Debug/Bug...
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RTL Design
2 months ago
hyderabad, India BITSILICA Full timeWe are currently seeking experienced RTL Engineers - Minimum 4 years of experience required - Proficiency in RTL development from micro-architecture - Expertise in SoC, Memory, Peripheral, Security, and Cache IP’s Analysis & Integration - Skilled in RTL Quality checks including VCS, synthesis checks, LINT, LEC, CDC - Strong background in Failures Debug/Bug...
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RTL Design Engineer
4 weeks ago
hyderabad, India BITSILICA Full timeExperience range : 4+ Yrs and above only(no freshers please)Work Location : HyderabadNotice : Immediate to 15 daysJob Scope:- RTL development from micro-architecture- SoC, Memory, Peripheral, Security and Cache IP’s Analysis & Integration- RTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC)- Failures Debug/Bug fixes on RTL and Netlist- Low level...
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RTL Design Engineer
3 months ago
hyderabad, India BITSILICA Full timeExperience range : 4+ Yrs and above only(no freshers please) Work Location : Hyderabad Notice : Immediate to 15 days Job Scope: RTL development from micro-architecture SoC, Memory, Peripheral, Security and Cache IP’s Analysis & Integration RTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC) Failures Debug/Bug fixes on RTL and Netlist Low level...
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Rtl design engineer
2 months ago
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RTL Design Engineer
3 months ago
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RTL Design Engineer
1 month ago
hyderabad, India BITSILICA Full timeExperience range : 4+ Yrs and above only(no freshers please)Work Location : HyderabadNotice : Immediate to 15 daysJob Scope:RTL development from micro-architectureSoC, Memory, Peripheral, Security and Cache IP’s Analysis & IntegrationRTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC)Failures Debug/Bug fixes on RTL and NetlistLow level design...
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Rtl design engineer
1 month ago
Hyderabad, India BITSILICA Full timeExperience range : 4+ Yrs and above only(no freshers please)Work Location : HyderabadNotice : Immediate to 15 daysJob Scope:RTL development from micro-architectureSo C, Memory, Peripheral, Security and Cache IP’s Analysis & IntegrationRTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC)Failures Debug/Bug fixes on RTL and NetlistLow level design...
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Senior RTL Design Engineer
5 days ago
Hyderabad, Telangana, India UST Full timeUST Seeks Experienced RTL Synthesis ExpertWe are looking for a seasoned RTL synthesis professional to join our team at UST. The ideal candidate will have extensive experience in RTL design, analysis, and optimization using industry-leading tools.About the Role:Design, implement, and verify complex digital circuits using RTL synthesis techniques.Collaborate...
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RTL Design Engineer
3 months ago
hyderabad, India BITSILICA Full timeExperience range : 4+ Yrs and above only(no freshers please) Work Location : Hyderabad Notice : Immediate to 15 days Job Scope: RTL development from micro-architecture SoC, Memory, Peripheral, Security and Cache IP’s Analysis & Integration RTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC) Failures Debug/Bug fixes on RTL and Netlist Low level...
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RTL Design Engineer
4 months ago
Hyderabad, India BITSILICA Full timeExperience range : 4+ Yrs and above only(no freshers please) Work Location : Hyderabad Notice : Immediate to 15 days Job Scope: RTL development from micro-architecture SoC, Memory, Peripheral, Security and Cache IP’s Analysis & Integration RTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC) Failures Debug/Bug fixes on RTL and Netlist Low level...
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RTL Design Engineer
3 months ago
hyderabad, India BITSILICA Full timeExperience range : 4+ Yrs and above only(no freshers please)Work Location : HyderabadNotice : Immediate to 15 days Job Scope: RTL development from micro-architectureSoC, Memory, Peripheral, Security and Cache IP’s Analysis & IntegrationRTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC)Failures Debug/Bug fixes on RTL and NetlistLow level design...
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RTL Design Engineer
4 months ago
Hyderabad, India BITSILICA Full timeExperience range : 4+ Yrs and above only(no freshers please)Work Location : HyderabadNotice : Immediate to 15 days Job Scope: RTL development from micro-architectureSoC, Memory, Peripheral, Security and Cache IP’s Analysis & IntegrationRTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC)Failures Debug/Bug fixes on RTL and NetlistLow level design...
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RTL Design Engineer
2 months ago
hyderabad, India BITSILICA Full timeExperience range : 4+ Yrs and above only(no freshers please) Work Location : Hyderabad Notice : Immediate to 15 days Job Scope: RTL development from micro-architecture SoC, Memory, Peripheral, Security and Cache IP’s Analysis & Integration RTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC) Failures Debug/Bug fixes on RTL and Netlist Low level...
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ASIC RTL Design Engineer
3 months ago
hyderabad, India Sevya Multimedia Full timeRTL Design Engineers at Hyderabad We need experienced engineers to work on cutting edge technology and with complex functionality. Skills: Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration. Proven hands-on experience with RTL design for IP, the subsystem for ASIC. Hands-on experience with SoC integration issues like...
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Asic rtl design engineer
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Hyderabad, India Sevya Multimedia Full timeRTL Design Engineers at Hyderabad We need experienced engineers to work on cutting edge technology and with complex functionality. Skills: Overall 3+ years industry experience with 2+ years in RTL Design and So C Integration. Proven hands-on experience with RTL design for IP, the subsystem for ASIC. Hands-on experience with So C integration...
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ASIC RTL Design Engineer
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hyderabad, India Sevya Multimedia Full timeRTL Design Engineers at HyderabadWe need experienced engineers to work on cutting edge technology and with complex functionality.Skills:Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration.Proven hands-on experience with RTL design for IP, the subsystem for ASIC.Hands-on experience with SoC integration issues like clocking,...