Senior Engineer, Design Verification Engineering

3 weeks ago


bangalore, India Analog Devices Full time
End to End Emulation ownership of IP or Subsystem or SOC level Define Emulation strategy, architecture, flow and methodology using Palladium or Protium Work with Design , verification, System FPGA and Software teams on hardware emulation requirements Emulation database creation, Synthesis, test development and verification Work with Engineering Enablement team, tool vendors for emulation flow, tool development Defining testplans, tests and verification methodology for block / subsystem and chip-level emulation. Coverage analysis and coverage improvement End to end System scenario development and validation Performance, bandwidth and latency measurement Come up with verification strategy for a product after going through product requirements and design specifications. B.Tech/M.Tech with 5+ years of industry experience in Digital verification and Emulation Expertise in Palladium or Protium Emulators is an added advantage Synthesis and emulation build creation, flow bring up and build release to other teams Good understanding of SOC/Subsystem design concepts and design architectures. Experience in Verilog, SV-UVM , SOC level testbenches is an added advantage Expertise in Performance , latency, bandwidth analysis and improvement Knowledge of microprocessor cores such as ARM, RISC-V, Tensilica , Neural Network, GPU Cores is a plus. Extensive knowledge in TCL/Python/shell-scripting Exceptional interpersonal and communication skills, collaborate and influence innovative design development/verification methodologies to wider team spread across the globe. Quick to adopt new technologies with good problem-solving skills. Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days

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