RTL ASIC Design Engineer

Note: This position requires 3+ years of industrial experience in RTL Design.Team and Role Overview: We are seeking a senior RTL Design Engineer to join our IC Design team. As a senior RTL Design Engineer, you will be responsible for and lead digital signal processing hardware designs, specifically data path as well as control intensive digital designs. You...

Job Title: ASIC RTL EngineerDuration: FulltimeLocation: BangaloreDescription:Experience in front end RTL design and front-end tools and flowsExperience in SOC integration, RTL release flows, clocking and reset architecture.Experience in post RTL checks — Lint, CDC, RDCExperience in RTL synthesis and static timing analysisExperience in working with...

Job Description AndGate Informatics Pvt. Ltd. is a technology solutions and recruitment company based in Bengaluru. Founded by industry professionals with extensive experience in Semiconductor, IT/Software, and Recruitment & Staffing, AndGate Informatics serves clients in India, Malaysia, Singapore, Vietnam, Taiwan, US, and UK. With a global team, we...

Harman India is looking for Lead RTL(ASIC) Design Engineer for Bangalore location.Work Mode: Work from office.Location: BangaloreSkill Set required:7 to 12 years of work experience in ASIC/IP Design.Experience in Logic design / RTL designExperience is IP design and integration.Experience in using the tools in ASIC development such as Lint and CDC are a...

Job Description : Key Responsibilities :Logic Design / RTL Design :- Develop and implement RTL designs for ASIC/IP projects.- Ensure that designs meet specified requirements and performance targets.- Perform design verification to ensure functional correctness.IP Design and Integration :- Design and integrate IP cores into complex SoC architectures. -...

Job Description :Key Responsibilities :Logic Design / RTL Design :- Develop and implement RTL designs for ASIC/IP projects.- Ensure that designs meet specified requirements and performance targets.- Perform design verification to ensure functional correctness.IP Design and Integration :- Design and integrate IP cores into complex SoC architectures.-...

Job Title: ASIC RTL EngineerDuration: FulltimeLocation: BangaloreDescription:Experience in front end RTL design and front-end tools and flowsExperience in SOC integration, RTL release flows, clocking and reset architecture.Experience in post RTL checks — Lint, CDC, RDCExperience in RTL synthesis and static timing analysis Experience in working with...

Description : 4 to 7 years of work experience in ASIC/IP Design. Experience in Logic design / RTL design Experience is IP design and integration. Experience in using the tools in ASIC development such as Lint and CDC are a must. Experience in Synthesis / Understanding of timing concepts is a plus. Good to have knowledge of AMBA protocols -...

Harman India is looking for Lead RTL(ASIC) Design Engineer for Bangalore location. Work Mode: Work from office. Location: Bangalore Skill Set required: 7 to 12 years of work experience in ASIC/IP Design. Experience in Logic design / RTL design Experience is IP design and integration. Experience in using the tools in ASIC development such as Lint and CDC are...

Hiring ASIC RTL Design Engineers !Experience : 4-20 yearsLocation: Kochi/Ahmedabad/Bangalore/Vizag· Architecture Developmento Experience in developing High Level Architecture for a Design Requirement from Specification levelo Extract Micro Architecture from High Level Architecture specification· RTL Design - Coding & Integrationo Develop the logic...

Hiring ASIC RTL Design Engineers !Experience : 4-20 yearsLocation: Kochi/Ahmedabad/Bangalore/Vizag· Architecture Developmento Experience in developing High Level Architecture for a Design Requirement from Specification levelo Extract Micro Architecture from High Level Architecture specification· RTL Design - Coding & Integrationo Develop the logic...

Hi All,We are Hiring ASIC RTL Design Engineers / Leads.Location: INDIA.Work Mode: Hybrid.Experience: 3 20 Yrs.Expertise in SoC/IP design.* Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog.* In depth knowledge on RTL quality checks (Lint, CDC).* Knowledge of synthesis and low power is a plus.* Good understanding...

Hi All, We are Hiring ASIC RTL Design Engineers / Leads. Location: INDIA. Work Mode: Hybrid. Experience: 3 20 Yrs. Expertise in SoC/IP design. * Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog. * In depth knowledge on RTL quality checks (Lint, CDC). * Knowledge of synthesis and low power is a plus. * Good...

Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for --Defining microarchitecture of digital blocks involving microcontroller-based designs to meet specifications, optimized for performance metrics of timing, area, and power.-Lead and also hands-on end-to-end ASIC design including RTL implementation and design processes of...

Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for --Defining microarchitecture of digital blocks involving microcontroller-based designs to meet specifications, optimized for performance metrics of timing, area, and power.-Lead and also hands-on end-to-end ASIC design including RTL implementation and design processes of...

ASIC Engineer - Design Silicon Systems Technology Group (SST) seeks ASIC Design Engineers to develop next generation of ASICs for new core routers, switches, and firewalls.Location: Bangalore/KolkataExperience: 5+ yearsOpportunity Snapshot:We are looking to hire sharp ASIC Design Engineer with excellent communication and leadership skills.You will be part of...

We are Hiring Senior ASIC/SoC RTL Leads/Managers with 10+ years of experience to join their team! This is an excellent opportunity to join one of the leading global information technology, consulting, and business process services companies. The ideal candidate should be an expert in SoC/IP design, have knowledge of RTL quality checks, synthesis, and low...

Job Description : - Develops preSilicon functional validation tests to verify system will meet design requirements. - Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing.Qualifications : - Candidate should...

Principal Engineer ASIC Digital DesignTop10 Semiconductor Organization in the WorldBangaloreWe are a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.Principal Engineer ASIC Digital DesignPosition...

Responsibilities :- SoC/IP Design: Develop and implement cutting-edge SoC and IP designs, ensuring high performance and reliability.- RTL Design: Expertise in IP design, subsystem/cluster, and SoC level integration using Verilog/System Verilog.- RTL Quality Checks: Perform rigorous RTL quality checks including linting and CDC to ensure design robustness and...