Synthesis Engineer

2 days ago

India 聯發科技 Full time

Synthesis Engineer: (3-10 Years) Key Responsibilities: Synthesis Environment setup Validating synthesis SDC quality Utilize Synthesis tool variables and methodologies to extract the best area/power achievable for the process node. Checking the synthesis DEF quality Analyze critical timing violation groups and congestion – solve them by finetune floorplan or placement constraints. Compare area/power with previous projects and check current project results. DFT Insertion and debugging basic DFT issues. Discuss directly with Design teams & Physical design teams to get the best synthesis results.

Requirements : Bachelors or Masters Degree with a strong VLSI Background Minimum 3 years of experience in the area of Synthesis

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