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Lead Core Regression Debug Engineer
2 months ago
Lead CPU verification engineer driving core level regression debug, triage and responsible for the functional sign-off for the core.
Functional verification with emphasis on core level regression debug and triage for simulation and emulation regressionsHands-on debug for core level failures. Propose and implement stimulus enhancements and debug capability improvements for core, cluster and chip level testbench environmentsPrimary owner for driving bug hunting using all available stimulus generators. Analysis of bugs found and proposing not only stimulus but also configuration and coverage changesDrive core level regression environment enhancements to improve the overall productivity for the teamDevelop detailed core level verification plans by understanding both ISA and microarchitectural specifications for the designSupport design deployment across simulation and emulation platformsDevelop random and directed stimulus that spans pre-silicon, emulation and post-silicon domainWork with design, test and post silicon validation teams to ensure high quality delivery of the entire CPU core / cluster
BS/MS/PhD in EE/ECE/CE/CS with at least 10 years of experienceStrong background and experience with high performance OOO CPU microarchitectureExperience and understanding of one or more ISAs - x86, ARM or RISCVSignificant experience debugging RTL and DV in a simulation environment, proficient at waveform and log file based debugExperienced with assembly, C/C++ and UVM based stimulus generation targeting both ISA and microarchitectural scenariosFamiliar with simulation, formal and emulation environmentsHands-on with scripting (Python, PERL)Experience with hardware description languages (Verilog, VHDL) and simulators (VCS, NC, Verilator)Strong problem solving and debug skills across various levels of design hierarchies
Locations:
Bangalore, India
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
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