Design Verification Engineer

4 weeks ago


Bangalore, India Codersbrain technology pvt ltd Full time

About us :


Coders Brain is a global leader in its services, digital and business solutions that partners with its clients to simplify, strengthen and transform their businesses. We ensure the highest levels of certainty and satisfaction through a deep-set commitment to our clients, comprehensive industry expertise and a global network of innovation and delivery centers. We achieved our success because of how successfully we integrate with our clients.


Quick Implementation - We offer quick implementation for the new onboarding client.

Experienced Team - Weve built an elite and diverse team that brings its unique blend of talent, expertise, and experience to make you more successful, ensuring our services are uniquely customized to your specific needs.

One Stop Solution - Coders Brain provides end-to-end solutions for the businesses at an affordable price with uninterrupted and effortless services.

Ease of Use - All of our products are user friendly and scalable across multiple platforms. Our dedicated team at Coders Brain implements keeping the interest of enterprise and users in mind.

Secure - We understand and treat your security with utmost importance. Hence we blend security and scalability in our implementation considering long term impact on business benefit.


Position : Design Verification Engineer


Notice Period : Immediate to 10 days


Interview mode : Face to face


Job Description :

  • 4+ years industry experience required
  • BS, MS in computer science or engineering
  • Experience with C/C++
  • Experience with System Verilog and UVM
  • Knowledge of AXI, APB, AHB and other bus protocols
  • Some level of processor-based verification
  • Experience with advanced verification techniques like constrained random generation, functional coverage, assertions, and formal verifiers
  • Experience with tools for regression management, configuration management and bug tracking
  • UPF simulation experience is plus
  • Any emulation, prototyping, post silicon debug experience is plus.
  • GLS debug and bring up experience is plus.
  • Understanding of overall ASIC/SOC architecture is plus

Skills : Design, Universal verification methodology (uvm), Verilog, C

(ref:hirist.tech)

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