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Engineer, Analog Layout
1 week ago
• Responsible for Layout Design and development of critical analog, mixed-signal and custom digital blocks.• Perform layout verification like LVS/DRC/Antenna, quality checks and support documentation.• Responsible for on-time delivery of block-level layouts and acceptable quality.• Taking up ownership in area estimation, scheduling and execution to meet project deadlines.• Ability to work closely with the team-members and should be a good team player.
Qualification/Requirements
• 2 to 5 years of experience in analog/custom layout design in advanced CMOS and Finfet processes - in various technologies and foundries ( ranging from 16nm to 130nm ).• Expertise in Cadence Virtuoso GXL / XL and DRC / LVS / Extraction ( Cadence / Mentor Graphics / Synopsys ) is a must.• Should have hands on experience in creating layout of critical blocks such as LDO, Bandgap, Ref Generators, Oscillator, etc.,• Good understanding of Analog Layout fundamentals (like - Matching, Electromigration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices etc.)• Understanding layout effects on the circuit such as speed, capacitance, power,area, etc.,• Ability to understand design constraints and implement high-quality layouts.• Excellent problem-solving skills in physical verification ( LVS / DRC / Antenna / PEX ) of custom layout.• knowledge in scripting languages (Skill, Python, Perl, TCL, SVRF,etc ).• Passion for continuous learning, innovation, success & teamwork.
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