FPGA Lead engineer

4 days ago

bangalore, India Megh Computing, Inc. Full time

FPGA Lead engineer at Megh Computing Inc. interested one can share resumes to or

Join us in building the best-in-class real-time analytics platform for creating actionable insights from streaming data.

Founded in 2017 by Intel veterans who pioneered adoption of FPGAs in data center, Megh Computing has taken the promise of heterogeneous computing from concept to production. Were based in Hillsboro (just outside of Portland), Oregon, and have development offices in Bangalore, India. We offer a fast-paced, exciting work environment with competitive salaries and benefits.

Megh won the Technology Association of Oregons (TAO) 2019 Technology Company of the Year award in their pre-revenue category.

We are focused on providing a real-time, AI-based video analytics solution that can be deployed on any platform using CPUs, GPUs, or FPGAs, from edge-to-cloud. DEPEND ON OPEN ANALYTICS

to deliver actionable insights and provide total control

Achieve true operational reliability with VAS, our customizable, cross-platform, real-time intelligent video analytics solution.

This position is located in Bangalore, India.

As an FPGA lead Engineer you will be leading the team & developing a platform that enables a system of networked FPGAs used for sophisticated algorithms utilizing deep learning. You will also be involved in creating custom accelerators for algorithms for image processing, video processing, network packet processing, and deep learning on FPGAs.

Responsibilities

Primary responsibilities include:

Design and develop custom accelerators for FPGAs

Develop unit-level test benches and basic verification

Design optimal solutions with a balance between performance and area

Provide assistance to other team members

Qualifications and experience

The following qualifications are required:

BS/MS with up to five years relevant experience

Degree program in EE or similar technical field

Experience in RTL design using SystemVerilog (preferred), Verilog.

Experience developing test benches and unit-testing

Sound knowledge of fundamentals of digital design

Good understanding of FPGA internals (Intel/Xilinx)

Able to map algorithms to hardware and design for optimal performance and resource utilization

Sound understanding of CDC

Strong technical and problem-solving skills

Strong written and verbal communications skills

Ability to define and execute tasks with limited direction

The following qualifications are highly desirable:

Good understanding of protocols such as AXI, Avalon

Working knowledge of PCIe and Ethernet

Experience using memory such as DDR2/3/4 SDRAMs

Experience using design tools such as Xilinx Vivado and Intel Quartus Good debuging skills and familiarity with SignalTap/ Logic analyzer

Comfort working in a Linux environment

Familiarity with basic scripting using TCL, Shell programming, Python, Familiarity with version control tools such as GIT

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