Senior/Lead STA engineer
3 days ago
We’re Hiring: STA Engineer | 5–15 Years Experience | Bangalore Company: ACL Digital Company Location: Bangalore Experience: 5 to 15 Years Job Type: Full-Time ACL Digital is looking for Senior Static Timing Analysis (STA) Engineers with solid experience in timing closure of advanced SoC designs. If you’re an STA expert who thrives in fast-paced, technically challenging environments, we want to hear from you Responsibilities: • Own and drive timing closure for complex SoC and ASIC designs across multiple technology nodes • Perform full-chip and block-level timing analysis using industry-standard tools (Primetime, Tempus, etc.)• Collaborate with RTL, synthesis, physical design, and verification teams to resolve timing violations • Develop and maintain timing constraints (SDC), run STA checks (setup, hold, DRV, SI), and support ECO timing closure • Contribute to methodology improvements and timing signoff strategies • Report timing status, risks, and closure plans to technical leads and project stakeholders Required Skills & Experience: • 5–15 years of solid hands-on experience in STA and timing closure • Strong expertise in timing concepts, constraints development, and signoff methodology • Proficient in tools like Synopsys Primetime, Cadence Tempus • Solid understanding of clock tree design, DFT, multi-mode multi-corner (MMMC) analysis • Good scripting skills (TCL/Perl/Python) to automate and debug flows • Experience with advanced nodes (7nm/5nm/FinFET) is a plus • Strong analytical, problem-solving, and communication skills Why Join Wafer Space?• Be part of a high-growth, innovation-driven semiconductor company • Work on state-of-the-art technologies with leading global clients • Collaborative and empowering work culture • Competitive compensation and flexible work options • Opportunity to grow your career in a technically challenging environment Interested? Send your resume to vaishnavi.suvarna@acldigital.com
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STA Engineer
3 days ago
Bangalore Division, India ACL Digital Full timeJob Title: STA Engineer Location: Banglaore/Hyderabad Employment Type: Full-time Industry: Semiconductors / VLSI / ASIC Design Job Summary: We are looking for a skilled and motivated STA Engineer to join our backend implementation team. The engineer will be responsible for RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, targeting...
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Senior/lead sta engineer
4 weeks ago
Bangalore, India ACL Digital Full timeWe’re Hiring: STA Engineer | 5–15 Years Experience | Bangalore Company: ACL Digital Company Location: Bangalore Experience: 5 to 15 Years Job Type: Full-Time ACL Digital is looking for Senior Static Timing Analysis (STA) Engineers with solid experience in timing closure of advanced So C designs. If you’re an STA expert who thrives in...
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Senior/Lead STA engineer
7 days ago
Bangalore, India ACL Digital Full timeWe’re Hiring: STA Engineer | 5–15 Years Experience | Bangalore Company: ACL Digital Company Location: Bangalore Experience: 5 to 15 Years Job Type: Full-Time ACL Digital is looking for Senior Static Timing Analysis (STA) Engineers with solid experience in timing closure of advanced SoC designs. If you’re an STA expert who thrives in fast-paced,...
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Senior/Lead STA engineer
6 days ago
bangalore, India ACL Digital Full timeWe’re Hiring: STA Engineer | 5–15 Years Experience | BangaloreCompany: ACL Digital CompanyLocation: BangaloreExperience: 5 to 15 YearsJob Type: Full-TimeACL Digital is looking for Senior Static Timing Analysis (STA) Engineers with solid experience in timing closure of advanced SoC designs.If you’re an STA expert who thrives in fast-paced, technically...
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Senior/Lead STA engineer
6 days ago
bangalore district, India ACL Digital Full timeWe’re Hiring: STA Engineer | 5–15 Years Experience | Bangalore Company: ACL Digital Company Location: Bangalore Experience: 5 to 15 Years Job Type: Full-Time ACL Digital is looking for Senior Static Timing Analysis (STA) Engineers with solid experience in timing closure of advanced SoC designs. If you’re an STA expert who thrives in fast-paced,...
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STA & Synthesis Engineer
3 days ago
Bangalore Division, India ACL Digital Full timeLooking for STA & Synthesis Engineer. Exp.-3.5+yrs. Job Location- Bangalore. Notice Period- Prefer Immediate joiner or less notice period. Netlist and constraint sign in checks and validation. Responsible to complete synthesis till final-opt with DFT insertion Experience with sign-off Static Timing Analysis, Logic equivalency checks, and Static Low Power...
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STA Engineer
5 days ago
Bangalore, India ACL Digital Full timeJob Title: STA Engineer Location: Banglaore/Hyderabad Employment Type: Full-time Industry: Semiconductors / VLSI / ASIC Design Job Summary: We are looking for a skilled and motivated STA Engineer to join our backend implementation team. The engineer will be responsible for RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, targeting...
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STA Engineer
6 days ago
bangalore, India ACL Digital Full timeJob Title: STA EngineerLocation: Banglaore/HyderabadEmployment Type: Full-timeIndustry: Semiconductors / VLSI / ASIC DesignJob Summary:We are looking for a skilled and motivated STA Engineer to join our backend implementation team. The engineer will be responsible for RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, targeting...
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STA Engineer
7 days ago
bangalore district, India ACL Digital Full timeJob Title: STA Engineer Location: Banglaore/Hyderabad Employment Type: Full-time Industry: Semiconductors / VLSI / ASIC Design Job Summary: We are looking for a skilled and motivated STA Engineer to join our backend implementation team. The engineer will be responsible for RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, targeting...
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Senior STA Architect
7 days ago
Bangalore, India Eximietas Design Full timeHello All, Eximietas Design Hiring STA Engineers/Leads Experience: 8+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: Experience in Static Timing Analysis (STA) for ASIC designs. Experience in developing timing constraints. Experience in timing closure and...
