IP Verification Engineer

Senior Verification EngineerEmail: prabhu.p@acldigital.comWhatsApp: 8754387484Location: Bangalore (Hybrid — 2 days/week onsite)Notice Period: Less than 30 days onlyExperience - 5 - 30 YearsJD 1 — Requirement: 1 RequirementRole: Senior Design Verification Engineer (15+ Years Experience) (Designation Based on the Final Discussion will decide with mutual...

Senior Verification EngineerEmail: WhatsApp: Location: Bangalore (Hybrid — 2 days/week onsite)Notice Period: Less than 30 days onlyExperience - 5 - 30 YearsJD 1 — Requirement: 1 RequirementRole: Senior Design Verification Engineer (15+ Years Experience) (Designation Based on the Final Discussion will decide with mutual understanding)Qualifications:- BE /...

Job Title :IP Verification Engineer – UVM verification Exp Level:4+ yrs Location:Bangalore/Hyderabad Job Description:System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip...

GFx IP Verification Engineer- Ramp up on the GFx IP and the verification infrastructure. - Debug C++ based testcases using logs and waveforms. - Regression debug and root cause, raise JIRAs and verify the fixes - Coverage analysis. - Port C++ tests to PSS. - Debug and fix the PSS tests to have the same result as C++ tests. - 4+ years of design verification...

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of...

GFx IP Verification EngineerRamp up on the GFx IP and the verification infrastructure. Debug C++ based testcases using logs and waveforms. Regression debug and root cause, raise JIRAs and verify the fixes Coverage analysis. Port C++ tests to PSS. Debug and fix the PSS tests to have the same result as C++ tests. 4+ years of design verification experience....

GFx IP Verification EngineerRamp up on the GFx IP and the verification infrastructure. Debug C++ based testcases using logs and waveforms. Regression debug and root cause, raise JIRAs and verify the fixes Coverage analysis. Port C++ tests to PSS. Debug and fix the PSS tests to have the same result as C++ tests. 4+ years of design verification experience....

Position Overview:In this role, you will be leading the verification/emulation planning and execution for complex IP/Sub-system projects. You will collaborate closely with cross-functional teams to ensure the highest quality and performance standards for our IP products. This role requires deep technical expertise, leadership skills, and a passion for...

Position Overview:In this role, you will be leading the verification/emulation planning and execution for complex IP/Sub-system projects. You will collaborate closely with cross-functional teams to ensure the highest quality and performance standards for our IP products. This role requires deep technical expertise, leadership skills, and a passion for...

Job Title:IP/SS/So C Verification Engineer (Hybrid – Bangalore / Hyderabad)Experience:4 to 15+ yearsNotice Period:Strictly less than 30 daysWork Type:HybridLocation:Bangalore / HyderabadJob DescriptionWe are looking for talentedSo C Verification Engineerswith strong expertise inSystem Verilog/UVM, solid debugging skills, and a deep understanding of...