Senior DFT Engineer
4 weeks ago
Change the world. Love your job.TI offers one of the world's largest portfolio of power management and delivery for CPU and GPU Servers, personal electronics and automotive. Our team has full product development responsibility from definition till releasing products to market for enterprise power delivery. We take pride in pushing the boundaries on innovation & executing ideas into winning products. Our team spans the entire spectrum of Systems and IP Specifications, System Level Simulations, Micro-Architecture Definition, Low Power Low Latency Architectures, IP Development, Advanced DFT, Formal Verification, Physical Design, Test, Validation and Application Engineering. We have a strong system that fosters technical innovations, publications and knowledge sharing. Our people-centric approach encourages collaboration, mentoring, multiskilling, domain rotation and ownership leading to accelerated career growth and an engaging working environment. We are now looking for talented Design for Test engineers for multi-million gate controller ASICs.Minimum Requirement3-5 yearsof relevant industry experience of which 2+ yr should be in chip/IP level DFT implementation. JTAG protocol basics. Understanding of DFT & ATPG concepts & best practices: Clock gating/bypass, Reset Bypass, Scan Collar, Clock Shaping, Fault models, Pattern Generation, Coverage, Debug and Closure of Coverage Gaps. Hands on experience in synthesis and scan stitching, scan chain integrity checks and test point insertion, scan architectures, clock generation architecture for at-speed tests with industry tools in a must. Cadence toolchain is preferred (Modus, Genus, Xcelium) Scripting in Tcl, Python/Perl/C Strong analytical and debugging skills Bachelor's degree in Electrical/Electronic Engineering or related field Thorough understanding of digital logic design with Verilog/ System VerilogPreferred QualificationsExperience in full-chip level DFT implementation Memory testing concepts: basics of memory testing algorithms, test architectures. Experience in ATE debug will be a plus LEC constraining for DFT. STA concept, DFT for multiple clock domains Debugging of mis-compares during pattern simulation. Experience in IP design and/or verification would be a plus Master’s degree in Electrical/Electronic Engineering or related field
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Senior DFT Engineer
3 weeks ago
New Delhi, India L&T Technology Services Full timeL&T Technology is hiring for Senior DFT Engineers / Lead DFT Engineer with 8-15 Years of experience.Job Location : BangaloreSkills Expertise should be : ATPG, SOC, ASIC DFT.
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Senior DFT Engineer
4 weeks ago
New Delhi, India Eximietas Design Full timeHi All, Greetings from Eximietas...!Position: Senior DFT Engineers/Leads/Architects. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US.We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge and experience in...
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Senior DFT Engineer
2 weeks ago
New Delhi, India Eximietas Design Full timeHi All,Greetings from Eximietas...!Position: Senior DFT Engineers/Leads/Architects.Experience: 8+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge and experience in scan...
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DFT Engineer
3 weeks ago
New Delhi, India ACL Digital Full timeDFT EngineerLocation: BangaloreNotice Period: 30 daysJob Description:We are looking for a skilled DFT Engineer with 3–5 years of experience in ASIC design and verification with a strong focus on Design-for-Test methodologies. You will be responsible for implementing and verifying DFT architectures to ensure high test coverage and manufacturability.Key...
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VLSI - DFT Senior Engineer/Lead Engineer
17 hours ago
New Delhi, India Eteros Technologies Full timeCompany: Eteros Technologies India Private LimitedEteros Technologies, Inc. is a Semiconductor Engineering services startup, head quartered in the heart of the Silicon Valley, San Jose, CA, USA. Eteros Technologies India Pvt Ltd is a wholly owned subsidiary offices in Bangalore, Noida, Hyderabad and Ahmedabad • Our world-wide customers are amongst The...
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Senior DFT Engineer and Lead DFT
3 days ago
New Delhi, India Capgemini Engineering Full timeRole: DFT EngineerExperience: 4 to 12 YearsLocation: BengaluruJob Description:- Will be responsible for Designing and Implementing DFT techniques. - Should hava a good understanding of Memory BIST/Scan /OnChip Compression/At-speed Scan/Test-clocking/Boundary Scan/Analog Testing/Pin-muxing/LogicBIST on complex SOCs to improve testability. - Test Modes...
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DFT- Sr. Lead
3 weeks ago
New Delhi, India HCLTech Full timeDesign for Testability (DFT) Engineer (Senior Level - 10+ years’ experience)Job Summary:We are seeking a highly accomplished Design for Testability (DFT) Engineer to join our elite team and lead the DFT efforts for our most critical ASIC and SoC projects. This senior-level position demands a mastery of DFT methodologies and the ability to drive the...
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DFT- Sr. Lead
4 weeks ago
New Delhi, India HCLTech Full timeDesign for Testability (DFT) Engineer (Senior Level - 10+ years’ experience)Job Summary: We are seeking a highly accomplished Design for Testability (DFT) Engineer to join our elite team and lead the DFT efforts for our most critical ASIC and SoC projects. This senior-level position demands a mastery of DFT methodologies and the ability to drive the...
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DFT Engineer
3 weeks ago
New Delhi, India Canvendor Full time#Urgent_Opening_for_Canvendor#Hiring: DFT Engineer (3+ Years Experience) |Bangalore| Immediate Joiners PreferredLocation: Bangalore, IndiaExperience: 3-8 YearsNotice period: Immediate to 30daysMandatory: DFT, ATPG, Scan Insertion, EDA Tools#Key_Requirements:- DFT Fundamentals including JTAG, Scan, ATPG, IEEE 1687 iJTAG, EDT Architecture - Scan Insertion...
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DFT Engineer
4 weeks ago
New Delhi, India ACL Digital Full timeDFT Engineer Location: Bangalore Notice Period:30 daysJob Description: We are looking for a skilledDFT Engineerwith 3–5 years of experience in ASIC design and verification with a strong focus on Design-for-Test methodologies. You will be responsible for implementing and verifying DFT architectures to ensure high test coverage and manufacturability. Key...
