Senior Analog Designer

3 weeks ago

Bengaluru, India Capleo Global Full time

Senior Analog Layout Engineer

Experience: 7-12 Years

Location: Bengaluru

Availability: Immediate to 15 days

Nodes Experience (Mandatory): 28nm/40nm & above


We are hiring a skilled Senior Analog Layout Engineer to join our team in Bengaluru. If you have extensive experience with 28nm/40nm nodes or above, and are available to start within 15 days, we would love to hear from you.


Key Responsibilities:

  • Perform IC mask layout design and physical verification for custom Analog/RF mixed signal, IO & ESD designs at the Block/Module level.
  • Execute and oversee layout activities, including LVS/DRC/antenna checks, for complex mixed signal integrated circuits.
  • Collaborate closely with circuit designers and CAD engineers to create and optimize custom Analog mixed-signal blocks layout.
  • Ensure adherence to established company-wide layout design & CAD methodologies and process flows.
  • Lead and manage a team of 4-5 professionals, providing guidance and support as necessary, and contribute individually when required.
  • Identify and resolve issues related to failure-prone circuit and layout structures, working in tandem with circuit designers to find optimal solutions.
  • The candidate should have worked on higher nodes 28nm/40nm & above.


Essential Requirements:

  • Bachelor's degree in a technology-related field with a minimum of 8 years - 10+ years of relevant experience in layout engineering for Analog/RF domains. Candidates from premier institutes are preferred for all experience levels.
  • Proficiency in transistor-level floor planning within a multi-voltage, mixed-signal, high-speed, and noise-sensitive environment.
  • Extensive experience with tools such as Cadence Virtuoso-XL, Virtuoso-L, Mentor Graphics Calibre, Cadence Assura/PVS, and Linux Operating System.
  • Strong expertise in interpreting and addressing Calibre/Assura DRC, LVS, ERC, antenna, and post-layout extraction issues.
  • In-depth knowledge of Analog layout techniques, CMOS fabrication concepts, and processes.
  • Excellent communication skills, both verbal and written, with proficiency in creating documents using Microsoft Office and Microsoft PowerPoint.
  • Familiarity with latch-up prevention, ESD protection schemes, and an understanding of issues related to RC delay, electromigration, and cross-capacitance.

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