Current jobs related to Physical Verification Engineer - Bengaluru - Advanced Micro Devices, Inc

  • Physical Verification Engineer

    4 weeks ago

    Bengaluru, India LeadSoc Technologies Pvt Ltd Full time

    Physical Verification Engineer Job Description - Work with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out. - Co-work with Place & Route team to resolve full-chip layout integration issues. - Work with various implementation team to drive Physical...

  • Physical Verification Engineer

    3 weeks ago

    Bengaluru, India LeadSoc Technologies Pvt Ltd Full time

    Physical Verification Engineer Job Description Work with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out. Co-work with Place & Route team to resolve full-chip layout integration issues. Work with various implementation team to drive Physical Verification...

  • Physical Verification Engineer

    2 days ago

    Bengaluru, India LeadSoc Technologies Pvt Ltd Full time

    Physical Verification Engineer Job Description Work with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out. Co-work with Place & Route team to resolve full-chip layout integration issues. Work with various implementation team to drive Physical Verification...

  • Physical Verification Engineer

    4 weeks ago

    Bengaluru, India LeadSoc Technologies Pvt Ltd Full time

    Physical Verification EngineerJob Description- Work with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.- Co-work with Place & Route team to resolve full-chip layout integration issues.- Work with various implementation team to drive Physical Verification-...

  • Physical Verification Engineer

    5 days ago

    Bengaluru, Karnataka, India Org Linked Full time ₹ 6,00,000 - ₹ 18,00,000 per year

    Job Title: Physical Verification EngineerLocation: BengaluruExperience: Around 5 yearsJob Type: Full-timeAbout the RoleWe are looking for an experienced Physical Verification Engineer to join our team and work on advanced ARM CPU implementation projects. The ideal candidate should have a strong background in physical verification (PV) and closure, with...

  • Physical verification engineer

    5 days ago

    Bengaluru, India LeadSoc Technologies Pvt Ltd Full time

    Physical Verification EngineerJob Description- Work with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.- Co-work with Place & Route team to resolve full-chip layout integration issues.- Work with various implementation team to drive Physical Verification-...

  • Physical Verification Engineer

    1 week ago

    Bengaluru, Karnataka, India LeadSoc Technologies Pvt Ltd Full time ₹ 15,00,000 - ₹ 25,00,000 per year

    Physical Verification EngineerJob DescriptionWork with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.Co-work with Place & Route team to resolve full-chip layout integration issues.Work with various implementation team to drive Physical VerificationCoordinates...

  • Physical Verification Engineer

    4 weeks ago

    Bengaluru, India LeadSoc Technologies Pvt Ltd Full time

    Physical Verification EngineerJob DescriptionWork with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.Co-work with Place & Route team to resolve full-chip layout integration issues.Work with various implementation team to drive Physical VerificationCoordinates...

  • Physical Verification Engineer

    5 days ago

    Bengaluru, India LeadSoc Technologies Pvt Ltd Full time

    Physical Verification EngineerJob DescriptionWork with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.Co-work with Place & Route team to resolve full-chip layout integration issues.Work with various implementation team to drive Physical VerificationCoordinates...

  • Physical Verification Engineer

    4 weeks ago

    Bengaluru, India LeadSoc Technologies Pvt Ltd Full time

    Physical Verification Engineer Job Description Work with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out. Co-work with Place & Route team to resolve full-chip layout integration issues. Work with various implementation team to drive Physical Verification...

Physical Verification Engineer

4 weeks ago

Bengaluru, India Advanced Micro Devices, Inc Full time
WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SILICON DESIGN ENGINEER 2 THE ROLE: As a member of the AECG Custom ASIC Group, you will help bring to life cutting-edge designs. As a member of the physical integration and verification team , you will work closely with the physical design implementation, IP teams and fab contacts to achieve quality tapeout and first pass silicon success. THE PERSON: A successful candidate will work on block level and SoC physical integration, verification and tapeout with physical design engineers. The candidate is expected to be detail-oriented, possessing good communication and problem-solving skills. KEY RESPONSIBLITIES: Work with PD team on subsystem and block level physical verification and signoff Work closely with physical design implementation and signoff team to achieve faster TAT Work closely with CAD team to come up with new flows and methodologies in the physical verification domain PREFERRED SKILLSET: 3+ years of relevant experience Sound knowledge of physical verification and design flows Hands on experience on industry standard tools such as Calibre and ICV Sound understanding for DRC/LVS decks. Should be able to make updates as required. Good in scripting languages such as Tcl and Perl Self driven, positive attitude and team worker ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-SR4 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.SILICON DESIGN ENGINEER 2 THE ROLE: As a member of the AECG Custom ASIC Group, you will help bring to life cutting-edge designs. As a member of the physical integration and verification team , you will work closely with the physical design implementation, IP teams and fab contacts to achieve quality tapeout and first pass silicon success. THE PERSON: A successful candidate will work on block level and SoC physical integration, verification and tapeout with physical design engineers. The candidate is expected to be detail-oriented, possessing good communication and problem-solving skills. KEY RESPONSIBLITIES: Work with PD team on subsystem and block level physical verification and signoff Work closely with physical design implementation and signoff team to achieve faster TAT Work closely with CAD team to come up with new flows and methodologies in the physical verification domain PREFERRED SKILLSET: 3+ years of relevant experience Sound knowledge of physical verification and design flows Hands on experience on industry standard tools such as Calibre and ICV Sound understanding for DRC/LVS decks. Should be able to make updates as required. Good in scripting languages such as Tcl and Perl Self driven, positive attitude and team worker ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-SR4
Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.