
ASIC RTL Design Engineer
3 days ago
Key skills with hand on:ASIC,RTL Design, VLSI-SOC ,AMBA, Lint, CDC, Synopsys LintCDC/VerdiXcellium/Synopsys DC. Experience:5 - 25 years Work Location:Trivandrum, Bangalore, Hyderabad, Chennai, Pune Education:Engineering (excluding Mechanical/Civil)Detailed JD: IP RTL design targeted for SOC, Static checks, some basic protocols Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks ( Lint, CDC ) Knowledge of synthesis and low power is a plus Good understanding ofAMBAbus protocols(AXI, AHB, ATB, APB ) Good understanding of timing concepts Knowledge of one or more of the interface protocols PCIe/DDR/Ethernet/I2C,UART/SPI Expertise in setting up and using tools like Spyglass Lint/CDC Synopsys DC Verdi/Xcellium Understanding of scripting languages like Make flow, Perl ,shell, python etc
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ASIC SOC RTL Design Lead
3 days ago
New Delhi, India Eximietas Design Full timeHi All,Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains.We are Hiring: ASIC SOC RTL Design Leads/Architect. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or...
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ASIC SOC RTL Design Lead
1 week ago
New Delhi, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads ..!Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled...
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ASIC SOC RTL Design Architect
3 days ago
New Delhi, India Eximietas Design Full timeHi All,Eximietas Design Hiring Senior RTL Design( Micro-architecture )Architects / Sr. Manager. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US.❖ Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics. ❖ Engineering10+ yearsof ASIC...
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ASIC RTL Design Engineer
1 day ago
New Delhi, India ACL Digital Full timeRTL (ASIC) Design EngineerExperience : 1-3 YearsLocation : HyderabadInterested,please share your updated resume to janagaradha.n@acldigital.com
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ASIC RTL Design Engineer
1 day ago
New Delhi, India eInfochips (An Arrow Company) Full timeGreetings of the day!!!This is regarding a Job opportunity with eInfochips as we are having a position of ASIC RTL DESIGN ENGINEERSExperience- 5+ Years Location- Bangalore, Ahmedabad Job Description: Experience in RTL design Verilog/VHDL Simulation tools, Modeslim/VCS etc. Basic protocols, I2C, UART, PCIe, SPI etc. Micro-Architecture experience is a plus...
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ASIC Design Engineer
1 day ago
New Delhi, India ACL Digital Full timeASIC Design EngineerWe are seeking a skilled ASIC Design Engineer with a solid background in digital design, RTL coding, and ASIC development. The ideal candidate will have extensive experience in designing, developing, and optimizing high-performance ASICs, with a strong focus on SystemVerilog or VHDL. This role will involve taking designs from concept to...
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Sr Technical Recruiter- ASIC
3 days ago
New Delhi, India Prodapt ASIC services (Formerly Innovative Logic) Full timeProdapt is a global technology company and the largest specialized player in the Connectedness industry. As an AI-first strategic partner, Prodapt provides consulting, business transformation, and managed services to top telecom and tech enterprises.Prodapt’s ASIC Servicesis a leading provider ofSoC ASIC/FPGA and Embedded Software services . We...
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ASIC RTL Engineer
1 day ago
New Delhi, India Wipro Full timeSenior ASIC/SoC RTL Engineer/Lead (IP RTL design targeted for SOC, Static checks, some basic protocols)Exp - 4 - 20Location :Bengaluru, Hyderabad, Pune, Noida, KochiExpertise in SoC subsystem/IP designExpertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System VerilogIn depth knowledge on RTL quality checks (Lint, CDC)Knowledge...
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RTL Lead and above
1 day ago
New Delhi, India Tessolve Full timeOpportunity With Tessolve Semiconductor- BangaloreHi All, we are hiring RTL design engineer and design verification engineer for Bangalore location. Exp: 5+ yr exp Skills: RTL ASIC, CDC, Lint, Synthesis, SpyglassWe are hiring for RTL ASIC engineer work experience in ASIC/IP Design. Experience in Logic design / RTL design Experience is IP design and...
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RTL Design Engineer
3 days ago
New Delhi, India ACL Digital Full timeHi FolksACL Digital is Hiring!Experience: 4 - 5+ YearsLocation: Bangalore / HyderabadLooking: Immediate to 20 daysHiring | RTL Design EngineerStrong experience in RTL Design using Verilog/System VerilogExposure to complex SoC/ASIC design and integrationHands-on with synthesis, Lint, CDC preferredShare resume at himabindu.jeevarathnam@acldigital.comThanks,K...