ASIC RTL Design Engineer
3 weeks ago
ASIC RTL Design Engineer Location : BangaloreJob Description: Skills & Experience: • 3-5 years of experience in ASIC front end design and quality check. • Strong fundamental knowledge of digital design, Verilog, and scripting language. • Experience in multiple clock and voltage domain design. • Working knowledge for FE flows like Lint, CDC, synthesis, and other quality checks. • Understanding of UPF and experience in low power checks is preferred. • Understanding of memory controller and/or cache controller and/or memory subsystem is add-on. • Must possess good communication skills; prior experience working with global teams is desirable. • MTech/B.Tech/BE - ElectronicsResponsibilities: • RTL Front-end quality checks – Lint, CDC, synthesis, LEC, low power checks. • Write and debug constraints for above QA flows. • Work with subsystem and/or SOC integration team on design integration and debugs. • Work with cross functional teams to ensure smooth and on-time execution. • Provide support to sub-system, SoC integration and synthesis, DFT, post-silicon debug. • Work with global team at different time zones
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Senior ASIC RTL Designer
2 days ago
New Delhi, India Eximietas Design Full timePosition: ASIC RTL Design EngineerLocation: Bangalore / HyderabadExperience: 6+ years- Design and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks. - Create micro-architecture specs and ensure designs meet performance, power, and area targets. - Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and...
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ASIC RTL Integration Engineer
6 days ago
New Delhi, India DevloiT Full timePosition: ASIC RTL Integration / ASIC RTL CodingLocation: Bangalore, IndiaEmployment Type: Long Term ContractMinimum Experience: 4 Years+About the Role:We are seeking a skilled ASIC RTL Integration Engineer with hands-on experience in developing and integrating RTL for IPs or subsystems. The ideal candidate should have a deep understanding of architectural...
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ASIC RTL Integration Engineer
4 days ago
New Delhi, India Devloit Full timePosition: ASIC RTL Integration / ASIC RTL CodingLocation: Bangalore, IndiaEmployment Type: Long Term ContractMinimum Experience: 4 Years+About the Role:We are seeking a skilled ASIC RTL Integration Engineer with hands-on experience in developing and integrating RTL for IPs or subsystems. The ideal candidate should have a deep understanding of architectural...
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ASIC SOC RTL Design Lead
6 days ago
New Delhi, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads..!Experience: 8+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled ASIC...
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ASIC RTL Integration Engineer
5 days ago
Delhi, India DevloiT Full timePosition: ASIC RTL Integration / ASIC RTL CodingLocation: Bangalore, IndiaEmployment Type: Long Term ContractMinimum Experience: 4 Years+About the Role:We are seeking a skilled ASIC RTL Integration Engineer with hands-on experience in developing and integrating RTL for IPs or subsystems. The ideal candidate should have a deep understanding of architectural...
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ASIC RTL Integration Engineer
6 days ago
Delhi, India DevloiT Full timePosition: ASIC RTL Integration / ASIC RTL CodingLocation: Bangalore, IndiaEmployment Type: Long Term ContractMinimum Experience: 4 Years+About the Role:We are seeking a skilled ASIC RTL Integration Engineer with hands-on experience in developing and integrating RTL for IPs or subsystems. The ideal candidate should have a deep understanding of architectural...
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RTL Design Engineer
2 weeks ago
New Delhi, India ACL Digital Full timeRTL Design Engineer (ASIC) Location: Chennai, Tamil Nadu Experience: 1 to 3 YearsJob DescriptionJob Role: Design and implement RTL for wireless modem IPs and SoC subsystems using Verilog/SystemVerilog. Develop micro-architecture specifications and deliver high-quality, synthesizable RTL. Integrate complex subsystems into SoC environments and support design...
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RTL Design Engineer
2 weeks ago
New Delhi, India ACL Digital Full timeRTL Design Engineer (ASIC)Location: Chennai, Tamil NaduExperience: 1 to 3 YearsJob DescriptionJob Role:- Design and implement RTL for wireless modem IPs and SoC subsystems using Verilog/SystemVerilog. - Develop micro-architecture specifications and deliver high-quality, synthesizable RTL. - Integrate complex subsystems into SoC environments and support...
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Lead RTL Design Engineer
2 weeks ago
New Delhi, India ACL Digital Full timeLead RTL Design Engineer (ASIC) Location: Chennai, Tamil Nadu Experience: 6 to 9 YearsJob Description6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable.Strong Domain Knowledge on RTL Design, implementation, and Timing analysis. Experience with RTL coding using Verilog/VHDL/System...
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Lead RTL Design Engineer
1 week ago
New Delhi, India ACL Digital Full timeLead RTL Design Engineer (ASIC)Location: Chennai, Tamil NaduExperience: 6 to 9 YearsJob Description6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable.- Strong Domain Knowledge on RTL Design, implementation, and Timing analysis. - Experience with RTL coding using Verilog/VHDL/System...