Senior Logic Design Engineer

Fortune100 companyLogic Design EngineerLogic Design Engineer Your Role and ResponsibilitiesAs a Logic designer, you will be responsible for E2E development of features with impact to our Mainframe and / or POWER customers. Develop the feature, present the proposed architecture in the High level design discussions .Estimate the overall effort to develop...

Senior Software Engineer-II: Application SecurityApplication Security SREs at Sumo Logic partner with our development teams, Security Operations Center (SOC), to ensure our products are secure and compliant. You will ensure operational excellence, security, and compliance of our entire cloud and technology stack!What you will do:Ensure engineering teams...

Senior Software Engineer-II: Application Security  Application Security SREs at Sumo Logic partner with our development teams, Security Operations Center (SOC), to ensure our products are secure and compliant. You will ensure operational excellence, security, and compliance of our entire cloud and technology stack! What you will do: Ensure...

About Eximietas: a technology services and solutions company headquartered in San Jose, CA with a global footprint that extends to Ahmedabad, Bangalore, Chennai and Bhubaneswar in India. Eximietas Design is a leading technology firm specializing in (VLSI/Cloud Computing/Cyber Security/AI/ML) solutions. With a commitment to innovation and excellence, we...

About Eximietas: Eximietas, a technology services and solutions company headquartered in San Jose, CA with a global footprint that extends to Ahmedabad, Bangalore, Chennai and Bhubaneswar in India. Eximietas Design is a leading technology firm specializing in (VLSI/Cloud Computing/Cyber Security/AI/ML) solutions. With a commitment to innovation and...

ResponsibilitiesAs a “Principal Engineer – Logic Design” in memory interface chip design team, you willDevelop micro-architecture and RTL design for digital components for DDR memory buffer and other mixed signal chip products.Along with logic/RTL design, you will be responsible for synthesis, quality checks (lint, clock domain crossing etc.) and...

Responsibilities As a “Principal Engineer – Logic Design” in memory interface chip design team, you will Develop micro-architecture and RTL design for digital components for DDR memory buffer and other mixed signal chip products. Along with logic/RTL design, you will be responsible for synthesis, quality checks (lint, clock domain crossing...

A Fortune 100 OrganizationLocation: BangaloreSENIOR LOGIC DESIGN ENGINEER – Memory Management UnitYour Role and ResponsibilitiesLead the Architecture, Design and development of processor MMU (Memory management unit) for high-performance Systems.Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to...

A Fortune 100 OrganizationLocation: BangaloreSENIOR LOGIC DESIGN ENGINEER – Memory Management UnitYour Role and ResponsibilitiesLead the Architecture, Design and development of processor MMU (Memory management unit) for high-performance Systems.Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to...

Logic MicroArchitect:Location: BangaloreWe are looking for someone who will lead the development of high-speed cutting-edge SerDes design. As the lead of the micro-architectural definition and design implementation, the selected candidate will drive logic chip design achieving data of 16Gbs and above.Experience:12+ Years of experience in PCIE G3/G4/G5 or...

Responsibilities:· Complete DFT ownership of projects including:· Test architecture definition.· Identifying and implementing RTL changes for DFT.· Performing scan insertion.· Developing timing constraints for test mode timing closure.· Scan and ATPG for different fault models.· Boundary scan, ACJTAG, IEEE 1500 implementation and verification.·...

Responsibilities:· Complete DFT ownership of projects including:· Test architecture definition.· Identifying and implementing RTL changes for DFT.· Performing scan insertion.· Developing timing constraints for test mode timing closure.· Scan and ATPG for different fault models.· Boundary scan, ACJTAG, IEEE 1500 implementation and verification.·...

Responsibilities: · Complete DFT ownership of projects including: · Test architecture definition. · Identifying and implementing RTL changes for DFT. · Performing scan insertion. · Developing timing constraints for test mode timing closure. · Scan and ATPG for different fault models. · Boundary scan, ACJTAG, IEEE 1500 implementation and verification....

RTL IP/Logic Design Engineers / Design Architect LeadsThis position is for IP Design Engineer Lead/manager role at Samsung Semiconductor India Bangalore, where you will be involved in RTL design, synthesis and verification of various complex IP modules of SSD/Flash storage products. You will be associated in the design development life cycle to support spec...

RTL IP/Logic Design Engineers / Design Architect LeadsThis position is for IP Design Engineer Lead/manager role at Samsung Semiconductor India Bangalore, where you will be involved in RTL design, synthesis and verification of various complex IP modules of SSD/Flash storage products. You will be associated in the design development life cycle to support spec...

RTL IP/Logic Design Engineers / Design Architect Leads This position is for IP Design Engineer Lead/manager role at Samsung Semiconductor India Bangalore, where you will be involved in RTL design, synthesis and verification of various complex IP modules of SSD/Flash storage products. You will be associated in the design development life cycle to support...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. · This role requires close interaction with multiple cross functional teams across geographies to align on project receivables/deliverables. · Mentoring junior engineers and driving innovation/automation. · BE/B.Tech/M.E/M.Tech with 7+...

Senior Software Engineer-I (Analytics)As a backend engineer in the analytics team, you will be responsible to help create a scalable, reliable and performant log analytics platform for observability and security products to empower our customers to rapidly create high-quality analyses that enable them to react in real time to events and...

Senior Principal Engineer AMS Circuit design:- Contribute to AMS design for High-speed Memory PHYs.- Responsible for entire PHY design or major design partitions- Understand system specification, define design micro-architecture, and design hierarchy.- Participate in technical discussions and represent AMS team in all the discussions with internal and...

Logic MicroArchitect:Location: BangaloreWe are looking for someone who will lead the development of high-speed cutting-edge SerDes design. As the lead of the micro-architectural definition and design implementation, the selected candidate will drive logic chip design achieving data of 16Gbs and above. SoC Micro-Architect, you will play a key role in the...