DFT Lead Engineer

1 month ago

Pune, India Spruce IT Pvt. Ltd. Full time

We are hiring for the DFT Engineer / Leads role.

Please find the JD below :

JOB Designation : DFT Engineers / Leads.

JOB Location : Bangalore, Pune, Noida, Chennai, Hyderabad, Ahmedabad India.

Mode of Hiring : Full-time [FTE], Onsite, 5 Days.

Notice Period : Immediate to 60 days.

Experience : 4-12 years.

Required Skills :

- Incumbent will be responsible for Scan insertion and validation, BIST, MBIST insertion and Validation, ATPG, IP tests and Pattern Validation w/wo Timing, DFT mode timing Analysis, and sign-off.

- Be responsible for a comprehensive DFT plan, drive the implementation, and work with DFT cross-functional teams.

Note : If anyone has more than 6 years of experience.

He/she must have team-leading experience.

Key Responsibilities :


Scan Insertion and Validation :


- Perform scan insertion and ensure the correctness of the scan chains.


- Validate scan functionality through simulation and debugging.


Built-In Self-Test (BIST) & Memory BIST (MBIST) :


- Insert BIST and MBIST structures into the design.


- Validate the functionality and coverage of BIST/MBIST implementations.


Automatic Test Pattern Generation (ATPG) :


- Generate ATPG patterns and ensure high fault coverage.


- Validate generated patterns for various test scenarios.


IP Tests and Pattern Validation :


- Develop and validate test patterns for IP blocks.


- Ensure test patterns work correctly with and without timing considerations.


DFT Mode Timing Analysis and Sign-off :


- Perform timing analysis in DFT mode to ensure timing closure.


- Sign off on timing aspects of the design in DFT mode.


Comprehensive DFT Plan :


- Develop a thorough DFT plan covering all aspects of DFT for the project.


- Drive the implementation of the DFT plan and ensure adherence to the schedule.


Collaboration with Cross-Functional Teams :


- Work closely with design, verification, and physical design teams to ensure seamless DFT integration.


- Coordinate with test engineering teams for pattern validation and testability issues.


Required Skills :


Technical Expertise :


- Proficiency in scan insertion, BIST, MBIST, and ATPG.


- Strong understanding of DFT principles and methodologies.


- Experience with EDA tools for DFT (e.g., Synopsys DFT tools, Cadence, Mentor Graphics).


Validation and Debugging :


- Hands-on experience with pattern validation and debug.


- Ability to analyze and resolve issues related to DFT implementations.


Timing Analysis :


- Knowledge of timing analysis tools and methodologies in DFT mode.


- Experience in ensuring timing closure for DFT designs.


Planning and Execution :


- Ability to develop and execute a comprehensive DFT plan.


- Strong project management skills to drive DFT implementation and validation.


Soft Skills :


- Excellent communication skills to work effectively with cross-functional teams.


- Strong problem-solving skills and attention to detail.


Preferred Experience :


- Prior experience in a leadership role within a DFT team.


- Experience with advanced node technologies and complex SoC designs.


- Familiarity with ISO 26262 or other functional safety standards.

(ref:hirist.tech)

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