Physical Verification engineer

Physical Verification EngineerJob DescriptionWork with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out. Co-work with Place & Route team to resolve full-chip layout integration issues. Work with various implementation team to drive Physical Verification...

Physical Verification EngineerJob Description- Work with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out. - Co-work with Place & Route team to resolve full-chip layout integration issues. - Work with various implementation team to drive Physical Verification -...

Physical Verification Engineer Experience: 2 to 5 Years Location: Bangalore Notice Period: Immediate Job Description Key Responsibilities: Perform Physical Verification checks including DRC, LVS, ERC , and Antenna checks at block and full-chip level . Work with foundry rule decks (TSMC / Samsung / GF / Intel / UMC etc.) to ensure design sign-off compliance....

Physical Verification EngineerExperience: 2 to 5 YearsLocation: BangaloreNotice Period: ImmediateJob DescriptionKey Responsibilities:Perform Physical Verification checks including DRC, LVS, ERC , and Antenna checks at block and full-chip level .Work with foundry rule decks (TSMC / Samsung / GF / Intel / UMC etc.) to ensure design sign-off compliance.Debug...

Perform Physical Verification for SoCs, cores, and block-level designs.Run and debug DRC, LVS, ERC, Antenna, and DFM checks.Collaborate with Physical Design (PNR) teams to resolve violations and achieve sign-off.Ensure tape-out readiness by validating design rules and foundry requirements.Work with CAD/methodology teams to enhance verification flows and...

Perform Physical Verification for SoCs, cores, and block-level designs. Run and debug DRC, LVS, ERC, Antenna, and DFM checks. Collaborate with Physical Design (PNR) teams to resolve violations and achieve sign-off. Ensure tape-out readiness by validating design rules and foundry requirements. Work with CAD/methodology teams to enhance verification flows and...

Job SummaryWe are seeking a highly experienced Senior Physical Design Engineer with a minimum of 10 years in the RTL to GDSII flow. This role requires hands-on expertise with Cadence Innovus, experience at N3 and below process nodes, and strong scripting and flow debugging skills.Key Responsibilities- Lead physical design activities from RTL to GDSII,...

Company Description Tranzium Semi Private Limited is a leading innovator in the semiconductor and software industry, dedicated to delivering high-performance, power-efficient chips for multinational technology leaders worldwide. Our vision is to be at the forefront of technological innovation, driving the advancement of tomorrow's most advanced technologies....

BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical DesignDetailed knowledge of EDA tools and flows for power, Ansys Redhawk /Cadence Voltus experience is mustExperience – 2+ yearsWell versed with the power grid design and power calculation methodologiesRole involves tasks in estimating power using industry standard tool , designing power grid...

Job Summary We are seeking a highly experiencedSenior Physical Design Engineerwith a minimum of 10 years in the RTL to GDSII flow. This role requireshands-on expertise with Cadence Innovus ,experience at N3 and below process nodes , andstrong scripting and flow debugging skills .Key Responsibilities Lead physical design activities from RTL to GDSII, ensuring...