Principal/Staff SerDes Design Engineer
1 day ago
Title-Principal/Staff SerDes Design Engineer Exp-10+ Loc-BangaloreJob Summary Seeking an experienced SerDes Design Engineer to develop next-generation high-performance wireline transceivers in advanced nodes. The role involves designing high-speed AMS circuits for SerDes PHY (TX, RX, CDR, PLL, biasing, clocking) with industry-leading power, performance, and area. Responsibilities Design and develop high-speed SerDes circuits (TX, RX, PLL). Perform AMS circuit simulations and signal-integrity analysis. Collaborate with layout teams for optimal physical implementation. Conduct lab validation, testing, and debug of SerDes IP. Resolve design issues and provide technical support. Mentor junior engineers and share technical best practices. Qualifications Bachelor’s/Master’s in Electrical Engineering or related field. 10+ years of SerDes design experience. Strong AMS design fundamentals (VCO, CDR, PI, DLL, biasing, high-speed clocking). Experience with high-speed digital design & SI analysis. Hands-on experience with lab equipment for characterization. Strong problem-solving and communication skills.Contact-neha@bestnanotech.in
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Principal/Staff SerDes Design Engineer
1 day ago
Delhi, India Best NanoTech Full timeTitle-Principal/Staff SerDes Design EngineerExp-10+Loc-BangaloreJob SummarySeeking an experienced SerDes Design Engineer to develop next-generation high-performance wireline transceivers in advanced nodes. The role involves designing high-speed AMS circuits for SerDes PHY (TX, RX, CDR, PLL, biasing, clocking) with industry-leading power, performance, and...
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RTL Release Principal Design Engineer
4 weeks ago
New Delhi, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer EngineeringExp- 7-12 Yrs- Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc.- Ability to debug existing Verilog/System verilog test cases with little or no help from the designer.- Functional simulation...
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Senior Analog Circuit Design Engineers
2 weeks ago
New Delhi, India Eximietas Design Full timeHi All,Greetings from Eximietas Design...!We are hiring Senior Analog Circuit Design Engineers.Experience: 8+ Years.Location: Bengaluru.The Candidate Should Have Strong Background In- CMOS Analog design fundamentals. - Example circuit blocks include OTA, Charge Pump, Bandgap Reference, Ring Oscillator, LC-VCO, etc. - Design of SERDES blocks like TIA, DRV,...
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Sr Principal PD Design Engineer
2 weeks ago
New Delhi, India Cadence System Design and Analysis Full timeThis is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher frequencies on latest Tech. nodes. Day-to-day tasks include floorplanning, placement, clock tree synthesis, routing,...
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Sr Principal PD Design Engineer
1 week ago
New Delhi, India Cadence System Design and Analysis Full timeThis is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher frequencies on latest Tech. nodes. Day-to-day tasks include floorplanning, placement, clock tree synthesis, routing,...
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AMS Circuit Design Engineer
3 weeks ago
New Delhi, India ACL Digital Full timeAMS Circuit Design Engineer Experience: 2 to 8 Years. Location: Hyderabad. Notice Period: 30 to 60 days.B.Tech or M.Tech. in Electronics and Electrical Engineering from an institute of repute. 2 to 8 years of experience in Analog and SERDES IP Circuit Design. The candidate should have relevant experience in following Analog IPs like GPIO, RCOMP, ADC, DAC,...
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AMS Circuit Design Engineer
4 weeks ago
New Delhi, India ACL Digital Full timeAMS Circuit Design EngineerExperience : 2 to 8 Years. Location : Hyderabad. Notice Period : 30 to 60 days.B.Tech or M.Tech. in Electronics and Electrical Engineering from an institute of repute. 2 to 8 years of experience in Analog and SERDES IP Circuit Design. The candidate should have relevant experience in following Analog IPs like GPIO, RCOMP, ADC, DAC,...
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AMS Circuit Design Engineer
3 days ago
New Delhi, India ACL Digital Full timeAMS Circuit Design EngineerExperience: 2 to 8 Years.Location: Hyderabad.Notice Period: 30 to 60 days.- B.Tech or M.Tech. in Electronics and Electrical Engineering from an institute of repute. - 2 to 8 years of experience in Analog and SERDES IP Circuit Design. - The candidate should have relevant experience in following Analog IPs like GPIO, RCOMP, ADC, DAC,...
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Analog Circuit Design Engineer
4 weeks ago
New Delhi, India ACL Digital Full timeHi All,Title:Analog Circuit Design Engineer:Exp Level:2+yrsLocation: BanglaoreJob Description:1. B.Tech or M.Tech. in Electronics and Electrical Engineering from an institute of repute.2. 2 + years of experience in Analog and SERDES IP Circuit Design.3. The candidate should have relevant experience in following Analog IPs like GPIO, RCOMP, ADC, DAC, LDO,...
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Layout Design Engineer
3 weeks ago
New Delhi, India KARMIC DESIGN PVT LTD Full timeJob SummaryWe are seeking a Senior Custom Layout Design Engineer with 5+ years of hands-on experience in analog/mixed-signal custom layout design. The ideal candidate should have strong expertise in high speed layout concepts and FinFET process nodes. You will be responsible for delivering high-quality layout designs and leading module-level layout...