
Softpath Technologies
2 weeks ago
Role : DFT Verification Engineer (DDR IP/Subsystem)
Location : Bangalore (Only Local Candidates)
Experience : 4 to 9 Years
Job Description :
We are looking for an experienced DFT Verification Engineer with strong expertise in DDR IP/Subsystem to join our team in Bangalore. The ideal candidate should have hands-on experience in silicon test pattern generation and gate-level simulations, with a focus on DDR interface testing.
Key Responsibilities :
- Perform DFT verification specifically for DDR IP/Subsystem.
- Generate silicon test patterns for DDR interface through JTAG.
- Verify test patterns using gate-level simulations.
- Collaborate with design and validation teams to ensure high-quality deliverables.
- Debug and resolve issues related to test patterns and simulations.
Required Skills & Experience :
- 4 to 9 years of relevant experience in DFT verification.
- Strong expertise with DDR IP/Subsystem.
- Hands-on experience in gate-level simulations.
- Knowledge of JTAG-based silicon test pattern generation.
- Strong debugging and problem-solving skills.
- Good communication and teamwork abilities.
Additional Information :
- Only candidates currently based in Bangalore will be considered.
- Immediate joiners or candidates with 015 days notice period are preferred.
(ref:hirist.tech)-
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