FPGA Design and Validation Engineer

2 months ago


Bengaluru, India Tech Mahindra (formerly Mahindra Satyam) Full time

Role/Skill: FPGA Design and Validation Engineer

Experience: 5-10 years

Location: Hyderabad

Notice: Early Joiners Preferred


Responsibilities:

  • Read and understand the Silicon Architecture specifications
  • Study standard specifications published by JEDEC for DDR4, DDR5, LPDDR4, LPDDR5 etc
  • Study the architecture, register maps, connection and configuration tables of DDR and PHY block
  • Should be able to capture the requirements and create Software requirements document
  • Develop the core to configure DDR block in Microchip FPGAs involving UI development and Netlist generation
  • Software development using Tcl/Perl/Python
  • Generation of design files (netlist, register settings, timing constraints) for DDR block
  • Should be able to estimate the efforts and provide the plan for completing the requirements
  • Propose / review test plans
  • Work across with multiple teams in accomplishing the tasks.
  • Co-work with multplie team members and help juniors
  • Work with Verification team in verifying DDR block, coverage, debugging and bug fixing

Required Skills

  • 2+ years of experience in DDR controller configuration/verification
  • Experience in writing scripts in Tcl/Perl/Python
  • Exposure to FPGAs and FPGA software tool chain
  • Experience in DDR PHY, DFI is plus
  • Experience in core development using TCL/C++ Programming Language is plus
  • Understanding of Verilog, Developing GUI using Qt is plus
  • Excellent communication and problem-solving skills are must
  • Good verbal & written communication
  • Good attitude, result driven & ability to deliver on next gen technology



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