FPGA RTL Design Engineer
4 days ago
Job Summary We are seeking a talentedFPGA RTL Design Engineerto design, implement, and verify digital logic using VHDL/Verilog for FPGA-based systems. The ideal candidate will be responsible for the full FPGA development lifecycle, from architecture design to verification, synthesis, implementation, and lab validation. You’ll work closely with system architects, hardware, and embedded software teams to deliver high-performance and reliable FPGA solutions.Responsibilities: Design and implement digital logic using HDLs (VHDL, Verilog) Develop optimized RTL code for complex FPGA designs, including high speed interfaces, data paths, and control logic. Perform functional simulation and timing analysis to validate design correctness. Synthesize and implement FPGA designs using tools like Xilinx Vivado, Intel Quartus, Lattice Diamond, Actel Libero IDE. Integrate IP cores and develop custom IPs for specific functionality. Conduct hardware debugging and validation in the lab using logic analyzers, oscilloscopes, and JTAG tools. Collaborate with PCB designers to define FPGA pin assignments and interface requirements Document design specifications, test plans, and results for internal reviews and compliance. Participate in design reviews, code reviews, and continuous improvement processes.Qualifications: Bachelor’s degree in Electronics / Electrical Engineering. 2+ years of experience in FPGA design and RTL coding. Strong proficiency in Digital design, RTL coding in VHDL, Verilog. Experience with FPGA design tools (Vivado, Quartus etc.). Familiarity with timing closure, floor planning, and constraint management. Strong proficiency in simulation tools, testbenches, and hardware debugging. Good understanding of digital logic, finite state machines, bus protocols Knowledge of SoC FPGA platforms (e.g., Zynq, Stratix 10 SoC). Strong problem-solving and communication skills
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FPGA RTL Design Engineer
3 weeks ago
Delhi, India Centaurus Technologies and Systems Private Limited Full timeJob SummaryWe are seeking a talentedFPGA RTL Design Engineerto design, implement, and verify digital logic using VHDL/Verilog for FPGA-based systems. The ideal candidate will be responsible for the full FPGA development lifecycle, from architecture design to verification, synthesis, implementation, and lab validation. You’ll work closely with system...
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ASIC SOC RTL Design Lead
4 days ago
New Delhi, India Eximietas Design Full timeHi All,Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains.We are Hiring: ASIC SOC RTL Design Leads/Architect. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or...
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ASIC SOC RTL Design Architect
4 days ago
New Delhi, India Eximietas Design Full timeHi All,Eximietas Design Hiring Senior RTL Design( Micro-architecture )Architects / Sr. Manager. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US.❖ Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics. ❖ Engineering10+ yearsof ASIC...
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Lead RTL Design Engineer
1 week ago
New Delhi, India ACL Digital Full timeLead RTL Design EngineersExperience Level:10+ years of RTL design and development Job Description: Silicon Design Engineer Location: Hyderabad and BangaloreBasic Job Deliverable: Silicon Design Engineer (RTL Design and Development) o Responsible for RTL design and development o Responsible for generating documents, such as requirements specification, design,...
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RTL Engineer
1 week ago
New Delhi, India CoreEL Technologies Full timeJob Description:- Understand customer’s requirements /specifications /tender enquiry. Define DSP, System and Board architecture. - Project ownership from concept to delivery. This includes identifying risks, dependencies, creating mitigation plan, tracking project schedule, discussions with customers, design reviews. - Partition the algorithms for...
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FPGA Design Engineer
4 days ago
New Delhi, India ACL Digital Full timeJob Title: FPGA Design EngineerExperience Required: 2+ yearsLocation: Hyderabad/BangaloreJob Type: Full-timeIndustry: Semiconductor / Electronics / Embedded SystemsJob Summary:We are looking for a highly skilled and experienced FPGA Design Engineer to join our hardware design team. The ideal candidate will lead the design, implementation, verification, and...
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FPGA Design Engineer
1 week ago
New Delhi, India ACL Digital Full timeJob Title:FPGA Design Engineer Experience Required:2+ years Location:Hyderabad/Bangalore Job Type:Full-time Industry:Semiconductor / Electronics / Embedded Systems Job Summary: We are looking for a highly skilled and experiencedFPGA Design Engineerto join our hardware design team. The ideal candidate will lead the design, implementation, verification, and...
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ASIC RTL Design Engineer
4 days ago
New Delhi, India 7hillsTS Full timeKey skills with hand on:ASIC,RTL Design, VLSI-SOC ,AMBA, Lint, CDC, Synopsys LintCDC/VerdiXcellium/Synopsys DC. Experience:5 - 25 years Work Location:Trivandrum, Bangalore, Hyderabad, Chennai, Pune Education:Engineering (excluding Mechanical/Civil)Detailed JD: IP RTL design targeted for SOC, Static checks, some basic protocols Expertise in SoC subsystem/IP...
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Sr RTL Principal Design Engineer
2 hours ago
New Delhi, India Cadence System Design and Analysis Full time- RTL Design Engineer for Interface Controller IP development team. - Position is based in Bangalore or Noida. - The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. - The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are...
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Sr RTL Principal Design Engineer
1 week ago
New Delhi, India Cadence System Design and Analysis Full timeRTL Design Engineer forInterface Controller IP developmentteam. Position is based inBangaloreor Noida. The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...
