Physical Design Engineer

4 weeks ago

Hyderabad, India Aiml Services - The Best VLSI Services Company Full time

Physical Design Engineers for ODC project:


AIML Services Pvt Ltd is Hiring Physical Design engineers (Trained freshers & experienced engg/Leads) for ODC Projects based in Bangalore/Hyderabad.


The physical design role in integrated circuit (IC) engineering involves transforming a logical design into a physical layout that can be manufactured. Physical design engineers utilize electronic design automation (EDA) tools to perform tasks such as floor planning, placement, routing, and verification.


Responsibilities


The job description of a Physical Design Engineer typically involves the following responsibilities and qualifications:

Responsibilities:

  1. RTL to GDSII Flow: Execute the complete RTL to GDSII (Register Transfer Level to Graphic Data System II) flow for digital integrated circuits.
  2. Floor Planning: Develop floor plans considering various design constraints such as area, power, and timing.
  3. Power Planning and Analysis: Design and analyze power distribution network to ensure reliable and efficient power delivery.
  4. Placement: Place standard cells and macros considering timing, area, and power requirements.
  5. Clock Tree Synthesis: Implement clock distribution networks to achieve skew and jitter targets.
  6. Routing: Perform detailed routing to meet timing, congestion, and electromigration requirements.
  7. Physical Verification: Conduct DRC (Design Rule Check), LVS (Layout Versus Schematic), and ERC (Electrical Rule Check) to ensure design correctness and reliability.
  8. Timing Closure: Work on timing closure including timing analysis, optimization, and fixing violations.
  9. Signal Integrity Analysis: Perform signal integrity analysis to ensure robustness against noise and crosstalk.
  10. Low Power Techniques: Implement low power design techniques such as power gating, voltage scaling, and clock gating.
  11. EDA Tool Proficiency: Proficient in EDA (Electronic Design Automation) tools like Cadence Innovus, Synopsys ICC, Mentor Graphics Calibre, and Prime Time.
  12. Collaboration: Collaborate with RTL designers, DFT engineers, and backend design teams to achieve design goals.
  13. Documentation: Document design methodologies, flows, and results for future reference and knowledge sharing.


Qualifications


  • Bachelor’s/Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • Strong understanding of digital design fundamentals and ASIC design flow.
  • Proficiency in scripting languages such as TCL, Perl, or Python for automation.
  • Hands-on experience with industry-standard EDA tools for physical design.
  • Good problem-solving skills and ability to work in a fast-paced environment.
  • Excellent communication skills and ability to collaborate effectively in a team.
  • Familiarity with low power design techniques and methodologies.
  • Knowledge of semiconductor fabrication processes and their impact on physical design.
  • Experience with multi-voltage and multi-power domain designs is a plus.
  • Familiarity with advanced node technologies like FinFET is desirable.

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