RTL Design Engineer-CXL
2 weeks ago
RTL Design Engineer(CXL)Experience - 5+yrsLocation- BangaloreJD- Strong RTL designer with IP design experience - SoC Integration - Interconnect Generation for a given configuration - CXL 3.1 and above design experience
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Sr RTL Principal Design Engineer
2 weeks ago
New Delhi, India Cadence System Design and Analysis Full time- RTL Design Engineer for Interface Controller IP development team. - Position is based in Bangalore or Noida. - The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. - The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are...
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Sr RTL Principal Design Engineer
3 weeks ago
New Delhi, India Cadence System Design and Analysis Full timeRTL Design Engineer forInterface Controller IP developmentteam. Position is based inBangaloreor Noida. The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...
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Staff PCIe/CXL based RTL Engineer
2 weeks ago
New Delhi, India Mulya Technologies Full timeStaff PCIe/CXL based RTL Engineer Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ BangaloreOur pay comprehensively beats "ALL" Semiconductor product players in the Indian market.JD for RTL person based on PCIe/CXL.1. Worked Hands On RTL development of atleast 5 yrs...
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IP Design Verification Engineer
2 weeks ago
New Delhi, India 7Rays Semiconductors Full timeAbout CompanyAt7Rays Semiconductors ( https://7rayssemi.com/) ,we provide end-to-end VLSI design solutions to help our clients achieve execution excellence. Our team of experts specializes in architecture, RTL design, verification, validation, physical design, implementation, and post-silicon validation using the latest technologies and methodologiesWe work...
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IP Design Verification Engineer
2 weeks ago
New Delhi, India 7Rays Semiconductors Full timeAbout CompanyAt 7Rays Semiconductors (https://7rayssemi.com/), we provide end-to-end VLSI design solutions to help our clients achieve execution excellence. Our team of experts specializes in architecture, RTL design, verification, validation, physical design, implementation, and post-silicon validation using the latest technologies and methodologiesWe work...
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ASIC SOC RTL Design Lead
3 weeks ago
New Delhi, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads ..!Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled...
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RTL Micro Architect
2 weeks ago
New Delhi, India Eximietas Design Full timeEximietas Hiring:ASIC SOC RTL Micro ArchitectExperience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled RTL Micro Architect to join our growing team. As a key contributor, you will play a critical role in...
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SoC Design Lead – High-Speed I/O Controller IP
2 weeks ago
New Delhi, India Mulya Technologies Full timeJob Title: SoC Design Lead – High-Speed I/O Controller IP Bangalore / Hyderabad We are a well-funded early-stage startup building the next generation of high-performance SoC design technologies. We’re looking for a seasoned SoC Design Lead with deep expertise in microarchitecture and RTL development to drive the design of one of PCIe, CXL, or UCIe...
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RTL Design Engineer
1 week ago
New Delhi, India ACL Digital Full timeJob Title: RTL Design Engineers Exp Level: 5+ yrs Loctaion: Hyderabad/BangaloreJob Description: • RTL coding knowledge • Top-level (SOC) level basic industry standard Arch knowledge • SoC & IP level Integration knowledge • IPXACT knowledge • IORING and Phys & GPIOs basic functionality • Design Partitioning(Tilification) knowledge • Design RTL...
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RTL Release Principal Design Engineer
2 weeks ago
New Delhi, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer Engineering Exp- 7-12 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional...