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ASIC Verification Engineer
3 weeks ago
- Required ASIC/RTL design verification engineer
- Experience:- 3-10 yrs
- Notice period:- immediate to 90 days
- Salary:- as per company
- Skills- Strong knowledge of SV and UVM
The purpose of the role is to develop modules in the company's next generation of ASICs for Radio
equipment and Radio Access Network compute.
These modules perform advanced signal processing.
This role includes test bench systemization, UVM test case development, verification, and product
documentation.
Required skills:
• UVM Verification
• ASIC Verification
• System Verilog
• Scripting
• Verification
• Product documentation
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ASIC Verification Engineer
2 months ago
pune, India Cientra techsolutions Full timeRequired ASIC/RTL design verification engineer Experience:- 3-10 yrs Notice period:- immediate to 90 days Salary:- as per company Skills- Strong knowledge of SV and UVM The purpose of the role is to develop modules in the company's next generation of ASICs for Radio equipment and Radio Access Network compute. These modules perform advanced signal...
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ASIC Verification Engineer
1 week ago
Pune, Maharashtra, India Cientra techsolutions Full timeRequired ASIC/RTL design verification engineerExperience:- 3-10 yrsNotice period:- immediate to 90 daysSalary:- as per companySkills- Strong knowledge of SV and UVMThe purpose of the role is to develop modules in the company's next generation of ASICs for Radioequipment and Radio Access Network compute.These modules perform advanced signal processing.This...
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ASIC Verification Engineer
3 weeks ago
pune, India Cientra techsolutions Full timeRequired ASIC/RTL design verification engineer Experience:- 3-10 yrs Notice period:- immediate to 90 days Salary:- as per company Skills- Strong knowledge of SV and UVM The purpose of the role is to develop modules in the company's next generation of ASICs for Radio equipment and Radio Access Network compute. These modules perform advanced signal...
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ASIC Verification Engineer
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Pune, India Cientra techsolutions Full timeRequired ASIC/RTL design verification engineerExperience:- 3-10 yrsNotice period:- immediate to 90 daysSalary:- as per companySkills- Strong knowledge of SV and UVMThe purpose of the role is to develop modules in the company's next generation of ASICs for Radioequipment and Radio Access Network compute.These modules perform advanced signal processing.This...
-
ASIC Verification Engineer
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Pune, Maharashtra, India Cientra techsolutions Full timeRequired ASIC/RTL design verification engineerExperience:3-10 yrsNotice period:immediate to 90 daysSalary:as per companySkillsStrong knowledge of SV and UVMThe purpose of the role is to develop modules in the company's next generation of ASICs for Radioequipment and Radio Access Network compute.These modules perform advanced signal processing.This role...
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