
Senior DFT Engineer
10 hours ago
Change the world. Love your job. TI offers one of the world's largest portfolio of power management and delivery for CPU and GPU Servers, personal electronics and automotive. Our team has full product development responsibility from definition till releasing products to market for enterprise power delivery. We take pride in pushing the boundaries on innovation & executing ideas into winning products. Our team spans the entire spectrum of Systems and IP Specifications, System Level Simulations, Micro-Architecture Definition, Low Power Low Latency Architectures, IP Development, Advanced DFT, Formal Verification, Physical Design, Test, Validation and Application Engineering. We have a strong system that fosters technical innovations, publications and knowledge sharing. Our people-centric approach encourages collaboration, mentoring, multiskilling, domain rotation and ownership leading to accelerated career growth and an engaging working environment.We are now looking for talented Design for Test engineers for multi-million gate controller ASICs.Minimum Requirement3-5 years of relevant industry experience of which 2+ yr should be in chip/IP level DFT implementation.JTAG protocol basics.Understanding of DFT & ATPG concepts & best practices: Clock gating/bypass, Reset Bypass, Scan Collar, Clock Shaping, Fault models, Pattern Generation, Coverage, Debug and Closure of Coverage Gaps.Hands on experience in synthesis and scan stitching, scan chain integrity checks and test point insertion, scan architectures, clock generation architecture for at-speed tests with industry tools in a must. Cadence toolchain is preferred (Modus, Genus, Xcelium)Scripting in Tcl, Python/Perl/CStrong analytical and debugging skillsBachelor's degree in Electrical/Electronic Engineering or related fieldThorough understanding of digital logic design with Verilog/ System VerilogPreferred QualificationsExperience in full-chip level DFT implementationMemory testing concepts: basics of memory testing algorithms, test architectures.Experience in ATE debug will be a plusLEC constraining for DFT.STA concept, DFT for multiple clock domainsDebugging of mis-compares during pattern simulation.Experience in IP design and/or verification would be a plusMaster’s degree in Electrical/Electronic Engineering or related field
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Senior DFT Engineer
10 hours ago
Bengaluru, Karnataka, India, Karnataka L&T Technology Services Full timeL&T Technology is hiring for Senior DFT Engineers / Lead DFT Engineer with 8-15 Years of experience. Job Location : Bangalore Skills Expertise should be : ATPG, SOC, ASIC DFT.
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DFT Engineer
10 hours ago
Bengaluru, Karnataka, India, Karnataka Ms Angel and Genie Full timeJob DescriptionWe are looking for an energetic, passionate and process oriented DFT Engineers who has extensive experience in planning, implementation and verification of DFT features for multiple SoC.Direct Responsibilities of the role, but not limited to,working on various aspects of IP and SoC DFT including the DFT Architecture, Spyglass DFT, RTL...
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DFT Design Engineer
10 hours ago
Bengaluru, Karnataka, India, Karnataka eInfochips Full timePOSITION TITLE: Senior Engineer- DFTLOCATION: Hyderabad/Bangalore/Pune/Ahmedabad/NoidaROLE & RESPONSIBILITIES · Incumbent will be responsible for Scan insertion and validation, BIST, MBIST insertion and validation, ATPG, IP Tests and Pattern validation w/wo Timing, DFT mode timing Analysis and sign off.· Be responsible for a comprehensive DFT plan·...
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Senior DFT Engineer
4 weeks ago
Bengaluru, Karnataka, India Mirafra Technologies Full timeMirafra Technologies Hiring Senior DFT Engineers:Experience - 5 to 15 yearsLocation - BengaluruNotice period - 0 to 30 daysQualification: Bachelors or Masters Degree in Electronics Engineering with at least 3+ years of experience.Please find the Job Description Below:Knowledge in latest innovative trends in DFT, understanding different DFT architecture...
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Senior DFT Engineer
1 week ago
Bengaluru, Karnataka, India Mirafra Technologies Full time ₹ 15,00,000 - ₹ 25,00,000 per yearMirafra Technologies Hiring Senior DFT Engineers:Experience - 5 to 15 yearsLocation - BengaluruNotice period - 0 to 30 daysQualification: Bachelors or Masters Degree in Electronics Engineering with at least 3+ years of experience.Please find the Job Description Below:Knowledge in latest innovative trends inDFT, understanding differentDFT architecture...
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DFT- Sr. Lead
10 hours ago
Bengaluru, Karnataka, India, Karnataka HCLTech Full timeDesign for Testability (DFT) Engineer (Senior Level - 10+ years’ experience)Job Summary:We are seeking a highly accomplished Design for Testability (DFT) Engineer to join our elite team and lead the DFT efforts for our most critical ASIC and SoC projects. This senior-level position demands a mastery of DFT methodologies and the ability to drive the...
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DFT Engineer
11 hours ago
Bengaluru, Karnataka, India, Karnataka ACL Digital Full timeDFT EngineerLocation: BangaloreNotice Period: 30 daysJob Description:We are looking for a skilled DFT Engineer with 3–5 years of experience in ASIC design and verification with a strong focus on Design-for-Test methodologies. You will be responsible for implementing and verifying DFT architectures to ensure high test coverage and manufacturability.Key...
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Senior/Staff DFT Engineer
11 hours ago
Bengaluru, Karnataka, India, Karnataka Synopsys Inc Full timeSr/Staff DFT Solutions Engineer: We're looking for DFT Solutions Engineer to join our team. The engineer works in a project-oriented environment to deliver complex DFT flows and methodologies across varying industry segments like Autonomous Transportation, Mission critical AI, High performance computing and Mobile networking. The engineer also interacts with...
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Senior DFT Engineer
10 hours ago
Bengaluru, Karnataka, India, Karnataka L&T Technology Services Full timeL&T Technology is looking to hire for DFT Engineer Job Location : Bangalore Skills should be : Scan insertion, ATPG, JTAG, test Kompress and scripting
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Senior DFT Engineer
3 weeks ago
Bengaluru, Karnataka, India Director Full timeRole & responsibilities :We are seeking an experienced Senior Design for Testability (DFT) Engineer with a proven track record in implementing and optimizing DFT methodologies for complex SoCs and ASICs. The ideal candidate will have deep expertise in scan insertion, ATPG, MBIST, and JTAG along with strong knowledge of ASIC design flows and tape-out...