Synthesis Design Engineer

Job description: Work on 4nm/3nm submicron Technologies Synthesis of the Top level and Block level Cowork with RTL and DFT engineers, prepare SoC Top/Block level constraints Develop Floorplanning and CTS guidelines for layout. Working experience with Physical Design will be an added advantage. Verify timing constraints with Time Vision. Analyze prelayout and...

Job description:Work on 4nm/3nm sub-micron TechnologiesSynthesis of the Top level and Block levelCo-work with RTL and DFT engineers, prepare SoC Top/Block level constraintsDevelop Floor-planning and CTS guidelines for layout.Working experience with Physical Design will be an added advantage.Verify timing constraints with Time Vision.Analyze pre-layout and...

Job Title: Synthesis and Static Timing Analysis EngineerMinimum 3 years of experience in STA/SynthesisHands-on experience and comprehensive knowledge of Synthesis and Static Timing AnalysisExperience in Logical aware Synthesis, Logical Equivalence check, and Static Timing analysisProficiency in DMSA flow to address pre and post STA timing issuesUnderstanding...

Title: PD(Synthesis) EngineerDescriptionFull chip rollup , Synthesis, Front end /Back end interactions, CDC, PAD IOs, Package designFull chip timing Primetime constraints, clocks.Familiarity with low power design. UPF flow for defining power intent of chips with multiple power domains.Voltage Island Coarse level UPF/ Clock gating.

3+ years experience in STA/Synthesis Hand-on Experience and Comprehensive knowledge of Synthesis and Static Timing Analysis. Hands-on experience on Logical aware Synthesis, Logical Equivalence check and Static Timing analysis. Hands-on the DMSA flow to fix pre and post STA timing. Knowledge on the Timing closure on Sub system level & Block level and Chip...

Job Title: PD (Front-end Synthesis) Engineer/Lead at Wipro India Looking for experienced engineers/leads proficient in Fullchip rollup, Synthesis, Front end/Back end interactions, CDC, PAD IOs, and Package design Experience in Fullchip timing, PrimeTime constraints, clocks, low power design, UPF flow, Voltage Island, Coarse level UPF, and Clock...

3+ years experience in STA/SynthesisHand-on Experience and Comprehensive knowledge of Synthesis and Static Timing Analysis.Hands-on experience on Logical aware Synthesis, Logical Equivalence check and Static Timing analysis.Hands-on the DMSA flow to fix pre and post STA timing.Knowledge on the Timing closure on Sub system level & Block level and Chip...

Hi All,We are looking for PD(Front-end Synthesis) Engineers/Leads.Fullchip rollup, Synthesis, Front end /Back end interactions, CDC, PAD IOs, Package designFullchip timing PrimeTime constraints, clocks.Familiarity with low power design. UPF flow for defining power intent of chips with multiple power domains.Voltage Island Coarse level UPF/ Clock...

Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for Defining microarchitecture of digital blocks involving microcontroller-based designs to meet specifications, optimized for performance metrics of timing, area, and power.-Lead and also hands-on end-to-end ASIC design including RTL implementation and design processes of...

Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for Defining microarchitecture of digital blocks involving microcontroller-based designs to meet specifications, optimized for performance metrics of timing, area, and power.Lead and also hands on end to end ASIC design including RTL implementation and design processes of...

Responsibilities: · Complete DFT ownership of projects including: · Test architecture definition. · Identifying and implementing RTL changes for DFT. · Performing scan insertion. · Developing timing constraints for test mode timing closure. · Scan and ATPG for different fault models. · Boundary scan, ACJTAG, IEEE 1500 implementation and verification....

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. · This role requires close interaction with multiple cross functional teams across geographies to align on project receivables/deliverables. · Mentoring junior engineers and driving innovation/automation. · BE/B.Tech/M.E/M.Tech with 7+...

Eximietas Design is a leading technology consulting and solutions development firm specializing in Chip design, Firmware and Embedded Software development, Cloud Computing, Cyber Security, and AI/ML domains. Our success is anchored in the unparalleled expertise of our engineering leadership team, whose collective experience spans renowned tech giants like...

Title: STA/Synthesis EngineerLocation: Bengaluru or HyderabadDescription:1. Performing Timing closure of partitions at SoC level2. Providing placement feedback with respect to timing3. Reduction of clock ID, by analyzing necessary tap points4. Providing clock pulls and pushes to attain better QoR before going to ECOs to reduce leakage/utilization...

Minimum 5-10 years Experience in Physical Design engineeringExperience serving as Lead physical design engineer or SOC or block coordinator or top level integrator in TSMC 12m process and beyond requiredExperience running Synthesis-to-GDS ready flows, advanced timing flows and power-driven PD flows (e.g., multi-domain designs with a UPF/CPF flow) , Strong...

Minimum 4-8 years Experience in Physical Design engineeringExperience serving as Lead physical design engineer or SOC or block coordinator or top level integrator in TSMC 12m process and beyond requiredExperience running Synthesis-to-GDS ready flows, advanced timing flows and power-driven PD flows, Strong expertise on low power methodology in FinFET design,...

Job Title: Design Engineer (RTL coding)Company: Cutting-Edge Semiconductor SolutionsAre you ready to dive into the fascinating world of chip design? We are looking for a skilled Design Engineer with expertise in RTL coding to join our dynamic team at Cutting-Edge Semiconductor Solutions.We need someone like you who can handle various tasks related to...

Qualifications: Bachelors' OR Masters' degree in Electronics Engineering or equivalent . Experience : 8 to 15 years of relevant experience Job role: We are looking for Graphics processing Unit (GPU IP) Physical Design expert who has expertise in one or more of following: Clock construction in multi clock designs. High instance design like >2.5M . Meeting...

We are seeking a passionate, innovative, and highly motivated senior design engineer to work on the design and implementation of a complex design unit that is an integral part of its CPUs. What you'll be doing: Design and implementation of modules. Make architectural trade-offs based on features, performance requirements and system limitations Come up...

My Client: Early-stage startup based in Silicon Valley, Austin TX and Bengaluru India and is funded by tier-1 Venture Capital and Corporate investors. Their Mission: Fuel the chiplet semiconductor revolution and chiplet economy with the best in class and scalable fabric, cache, coherency IPs and software platforms. Delivering the industry's first software...