Synthesis Design Engineer
2 weeks ago
Job description:
Work on 4nm/3nm sub-micron TechnologiesSynthesis of the Top level and Block levelCo-work with RTL and DFT engineers, prepare SoC Top/Block level constraintsDevelop Floor-planning and CTS guidelines for layout.
Working experience with Physical Design will be an added advantage.Verify timing constraints with Time Vision.
Analyze pre-layout and post-layout timing, generate Timing and Power ECOs, work closely with layout engineers to achieve full chip timing closurePerform in-house quality check before P&R and after P&R.
Power domain checks for Block and Top, CLPJob Requirement8+ years
working experience with top/block level Synthesis, Timing closure (STA), Physical Design feedbacks.
Good experience using PrimeTime , Designcompiler and Genus.
Good understanding of Deep Sub Micron topicsWell versed with TCL / Perl scriptExperience handling UPF and Conformal Low Power checksAbility to communicate effectively with multiple global cross-functional teamsEnthusiastic and ability to be an independent player and work in teamsExperience with SoC top design, floorplan, task tracking is a plus
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Synthesis Design Engineer
2 weeks ago
Bengaluru, Karnataka, India MediaTek Full timeJob description: Work on 4nm/3nm submicron Technologies Synthesis of the Top level and Block level Cowork with RTL and DFT engineers, prepare SoC Top/Block level constraints Develop Floorplanning and CTS guidelines for layout. Working experience with Physical Design will be an added advantage. Verify timing constraints with Time Vision. Analyze prelayout and...
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STA/Synthesis Engineer
1 week ago
Bengaluru, Karnataka, India 7Rays Semiconductors India Private Limited Full timeJob Title: Synthesis and Static Timing Analysis EngineerMinimum 3 years of experience in STA/SynthesisHands-on experience and comprehensive knowledge of Synthesis and Static Timing AnalysisExperience in Logical aware Synthesis, Logical Equivalence check, and Static Timing analysisProficiency in DMSA flow to address pre and post STA timing issuesUnderstanding...
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Synthesis Design Engineer
2 weeks ago
Bengaluru, Karnataka, India MediaTek Full timeJob description:Work on 4nm/3nm sub-micron TechnologiesSynthesis of the Top level and Block level Co-work with RTL and DFT engineers, prepare SoC Top/Block level constraintsDevelop Floor-planning and CTS guidelines for layout. Working experience with Physical Design will be an added advantage.Verify timing constraints with Time Vision.Analyze pre-layout and...
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Synthesis Engineer
1 week ago
Bengaluru, Karnataka, India Wipro Full timeTitle: PD(Synthesis) EngineerDescriptionFull chip rollup , Synthesis, Front end /Back end interactions, CDC, PAD IOs, Package designFull chip timing Primetime constraints, clocks.Familiarity with low power design. UPF flow for defining power intent of chips with multiple power domains.Voltage Island Coarse level UPF/ Clock gating.
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Sta/Synthesis Engineer
2 weeks ago
Bengaluru, Karnataka, India 7Rays Semiconductors India Private Limited Full time3+ years experience in STA/Synthesis Hand-on Experience and Comprehensive knowledge of Synthesis and Static Timing Analysis. Hands-on experience on Logical aware Synthesis, Logical Equivalence check and Static Timing analysis. Hands-on the DMSA flow to fix pre and post STA timing. Knowledge on the Timing closure on Sub system level & Block level and Chip...
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PD - Frontend Synthesis
1 week ago
Bengaluru, Karnataka, India Wipro Full timeJob Title: PD (Front-end Synthesis) Engineer/Lead at Wipro India Looking for experienced engineers/leads proficient in Fullchip rollup, Synthesis, Front end/Back end interactions, CDC, PAD IOs, and Package design Experience in Fullchip timing, PrimeTime constraints, clocks, low power design, UPF flow, Voltage Island, Coarse level UPF, and Clock...
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STA/Synthesis Engineer
2 weeks ago
Bengaluru, Karnataka, India 7Rays Semiconductors India Private Limited Full time3+ years experience in STA/SynthesisHand-on Experience and Comprehensive knowledge of Synthesis and Static Timing Analysis.Hands-on experience on Logical aware Synthesis, Logical Equivalence check and Static Timing analysis.Hands-on the DMSA flow to fix pre and post STA timing.Knowledge on the Timing closure on Sub system level & Block level and Chip...
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Pd - Frontend Synthesis
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Bengaluru, Karnataka, India Wipro Full timeHi All,We are looking for PD(Front-end Synthesis) Engineers/Leads.Fullchip rollup, Synthesis, Front end /Back end interactions, CDC, PAD IOs, Package designFullchip timing PrimeTime constraints, clocks.Familiarity with low power design. UPF flow for defining power intent of chips with multiple power domains.Voltage Island Coarse level UPF/ Clock...
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RTL Principal Design Engineer
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STA/Synthesis Engineer
2 weeks ago
Bengaluru, Karnataka, India Wipro Full timeTitle: STA/Synthesis EngineerLocation: Bengaluru or HyderabadDescription:1. Performing Timing closure of partitions at SoC level2. Providing placement feedback with respect to timing3. Reduction of clock ID, by analyzing necessary tap points4. Providing clock pulls and pushes to attain better QoR before going to ECOs to reduce leakage/utilization...
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