Staff Design Verification Engineer
1 week ago
Job Description
Understanding the RTL design and Uarch of IPs and integrating them in sub-systems SoC IP Uarch definition and RTL development Own RTL Quality Checks: Clock Domain Crossing (CDC) check, Lint, etc. Design for Testability (DFT) checks Low Power Checks RTL Synthesis and STA support Pre and Post Silicon functional verification support Close collaboration with different domain teams Qualifications
7-12 years of experience in complex IP/SoC Pre-Silicon Verification. Good hands-on experience in OVM/UVM SV or C based test-coding. Lead or co-own verification at the SoC, Subsystem, or IP level for Automotive MCUs/SoCs. Own test content development and functional/code coverage closure. Support Post-Si validation teams in Silicon bring-up and functional validation. Company Description
Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world's leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.
Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what's next in electronics and the world.
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