Design Engineer

2 weeks ago

Bengaluru, Karnataka, India Tessolve Semiconductor Pvt. Ltd. Full time
Greetings From Tessolve Semiconductors.
A widely leading core semiconductor company in world wide.

HIRING.. TESSOLVE SEMICONDUCTORS PVT LTD

DFT REUIREMENT – 2024

Location – Malaysia, Bangalore, CanadaExperience – 4+ years to 20+ years

We're hiring highly skilled DFT Engineers for all the DFT Techniques (ATPG, SCAN, JTAG, MBIST).

if you're good at any one or all the DFT techniques and looking for a Long-term Career growth opportunity in Leading Core Semiconductor company then it's right fit job to you.

Kindly go through the below JD to understand more about the requirement & company

Technical Skill set -Job Description - SOC DFT -3-5 years of industry experience in DFT domainStrong understanding of Scan and ATPG fundamentalsMust have worked on at least 2~3 SOCShould have worked in SOC SCAN with Mentor TKExperience in design and verification of test control logic (TCU)Should have expertise in pattern generation for different fault models, coverage analysis and improvement using Mentor FastscanExperience in gate level simulation; with and without timingShould know Verilog/VHDL/Perl/TCL scripting

Mixed Signal DFT Requirement -Strong fundamental knowledge of DFT/DFD techniquesStrong fundamental knowledge on transistor level circuits with mixed signal/analog backgroundExperience in Logic Design, Verilog RTL, verification, and static timing analysisKnowledge in fault modeling Stuck-at, Transition, Path Delay and other advanced DFT modelsKnowledge in JTAG, MBIST, Scan Compression, ATPG, Fault Simulation and at-speed testingExperience with industry ATPG tools such as Synopsys Tetramax or Mentor Fastscan ATPG toolsWorking knowledge in Perl preferredDetail oriented with strong organizational, problem solving and communication skills

SOC DFT - MID LEVEL SENIOR REQ -Implementation and verification of DFT architecture and featuresScan/Jtag/boundary scan insertion and ATPG pattern generationMemory BIST logic generation, implementation and verificationATPG patterns verification with gate level simulationUnderstanding of Design For Test methodologies and DFT verification experience (eg. IEEE1500, JTAG 1149.x, scan, memory BIST, ... etc)Experience with Mentor testkompress and/or Synopsys Tetramax/DFTMAXExperience with VCS simulation tool, Perl/Shell scripting and Verilog RTL design


DFT LEAD REQUIREMENT -Participate and drive SOC full Chip DFT feature and architecture definitionResponsible for DFT specification generation and reviewDrive a team to implement SOC DFT functions including SCAN, Boundary SCAN, MBIST, Analog Macro test logicDrive performance verification on all DFT structuresGenerate and verify DFT structural patterns and functional patternsBS in EE & CS.

MS preferred, with 10+ years experienceFamiliar with entire ASIC design flowExperience with micro processor design a big plusLI-DM1

Interested can apply and Refer to your friends to support the more clarification

Tessolve Semiconductors


Tessolve Semiconductors a venture of Hero Electronix, part of $10B Hero Group companies a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions.

We are Global Multi- National Company having Engineering and Sales presences in India, Malaysia, Singapore, USA, UK, Europe, and China.

Tessolve has strategic and sustainable growth plan to ensure the business stability to our valued customers and to protect the career of our employees even under disturbed Business situations.


Disclaimer:
At Tessolve, we are committed to fostering a workplace that embraces and celebrates diversity in all its forms. We believe that diverse teams drive innovation, creativity, and success.

We are dedicated to creating an inclusive environment where all employees, regardless of their race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status, feel valued and respected.

We believe in fair and equitable treatment for all employees and aim to eliminate any biases or barriers that may hinder personal or professional growth.

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