FPGA Design and Validation Engineer
2 weeks ago
Overview
Lattice Semiconductor (NASDAQ: LSCC) is the global leader in smart connectivity solutions, providing market leading intellectual property and low-power, small form-factor devices that enable more than 8,000 global customers to quickly deliver innovative and differentiated cost and power efficient products.
The Company's broad, end-market exposure solves customer problems across the network from the Edge to the Cloud for clients in consumer electronics, industrial equipment, communications infrastructure, computing and automotive. Our technology, long-standing relationships and commitment to world-class support enables our customers to quickly and easily unleash innovative solutions to create a smart, secure and connected world.
Our control, connect and compute solutions enable the Internet of Things to operate safely, easily and more autonomously at the edge of the network core. While you may not see our products, you are interacting with them all day, every day. We make your experience smarter and better-connected. Join Team help us continue to drive innovation that creates a smarter, better-connected world. Together, we enable what's next.
Responsibilities & Skills
Responsibilities & Skill
System and Solutions Engineering's mission is to create growth opportunities and impacts with programmable logic. Our vision is to unleash FPGA designs' potential through system solution innovation. In this role you will be responsible to integrate IPs with RISC-V core and make sure we can create complex SOC on Lattice low power FPGA. As part of R&D team, you will propose innovative solutions to enable embedded designs that are well tuned to meet desired performance goals. Your skills in HW/SW co-design and co-verifications should help you to deliver systems for wide range of target applications
Job Description
We are seeking a highly motivated SOC design engineer who will be responsible to design and develop Embedded Systems on FPGA. As a senior member of the team, you are responsible to integrate Lattice IPs in a RISC-V system. You need to have good understanding of embedded system design for bare metal applications and RTOS based applications. You will own all quality aspects of system including nightly regression, code coverage and responsible to deliver design documents, test coverage reports and user guide. You are also required to mentor junior members in the team.
Requirements
Key Skills
Good understanding of designing and debugging systems with RISC-V, AXI4, DDR, NOC and other system components. Hands-on experience in integrating sensors like camera, LiDAR, microphones with FPGA. FPGA bring-up and debug experience. Experience in developing RTL using Verilog-HDL and timing closure on complex SOC. C programming experience. Good understanding of system bring-up and debug issues at board level. Skills related to optimizing for power, performance and area.Education and General:
BS/MS/PhD in Electronics or Computer Engineering minimum of 8 years (6 for MS) of system design experience. Independent and self-motivated, capable of executing under dynamic environment and uncertainties. Innovative, problem solver who likes to come up with newer and better solutions for existing problems. Good communication skill.-
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