RTL Design and Synthesis Engineer
5 days ago
Expertise in one or more of the following domains:Power Optimization: Experience with low-power design techniques and methodologies, including the use of the Unified Power Format (UPF).Timing Optimization: Proficiency in static timing analysis (STA) and experience with design constraints using the Synopsys Design Constraints (SDC) format.Functional Safety Analysis: Deep understanding of functional safety concepts and standards (e.G., ISO 26262), and experience with related analysis techniques like FMEDA and FTA.Experience with industry-standard Electronic Design Automation (EDA) tools from vendors such as Synopsys, Cadence, or Siemens EDA.Proficiency in hardware description languages (HDLs) such as Verilog and System Verilog.Strong scripting skills in Python and Tcl for tool automation and flow development.Solid understanding of the chip design and implementation flows, from RTL to GDSII.Excellent problem-solving, debugging, and analytical skills.Strong communication and presentation skills, with the ability to explain complex technical concepts to both technical and non-technical audiences.RequirementsRequired QualificationsBachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.5+ years of hands-on experience in chip design, with a strong focus on RTL design, synthesis, static timing analysis (STA), or power integrity.
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RTL Synthesis and STA
5 days ago
Bengaluru, Hyderabad, India Acesoft Labs Full time ₹ 6,00,000 - ₹ 18,00,000 per yearDear Candidate,We are hiring for our esteemed client for the role STA & Synthesis Engineer.Exp - 3+ YearsNP - Immediate to 15 DaysLocation - Bangalore, Hyd (WFO)JD -Synthesis & STA Engineers:Synthesis & STA engineers will perform RTL Synthesis to achieve the best Performance/Power/Area of the designs, DFT insertions that include MBIST and SCAN, setup Timing...
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RTL Design Engineer
5 days ago
Hyderabad, India ACL Digital Full timeJob Title: RTL Design Engineers Exp Level: 2-3 yrsLoctaion: HyderabadJob Description:Seeking a motivated RTL Design Engineer to develop, integrate, and verify digital logic using Verilog/SystemVerilog .Responsibilities include ASIC/SoC IP integration , linting, synthesis, and working closely with verification teams.Requires strong...
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Senior RTL Design Engineer
8 hours ago
Hyderabad, Telangana, India SEMI LEAF Full time ₹ 20,00,000 - ₹ 25,00,000 per yearDear Connections,We are Hiring "RTL Design Engineer"· Location: Bangalore/Hyderabad· Experience: 4+ YearsJob Summary :We are looking for highly skilled RTL Design Engineers with proven hands-on experience in at least three end-to-end production-grade projects.The ideal candidate should have a strong foundation in RTL coding...
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ASIC RTL Design Engineer
4 hours ago
Hyderabad, Telangana, India AideWiser SolTek Full time ₹ 1,04,000 - ₹ 1,30,878 per yearASIC RTL Design EngineerJob Description:Exp: 5 to 8 yrsLocation: HyderabadGood knowledge on the digital concepts and ASIC flowExperience in RTL coding is a must.Must have hands on experience with SoC design and integration.Experience in Verilog/System-Verilog is a must.knowledge of AMBA protocols - AXI, AHB, APBBasic knowledge on verificationUnderstanding of...
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RTL Design Engineer
7 days ago
Hyderabad, India ACL Digital Full timeJob Title: RTL Design EngineersExp Level: 2-3 yrsLoctaion: HyderabadJob Description:Seeking a motivated RTL Design Engineer to develop, integrate, and verify digital logic using Verilog/SystemVerilog .Responsibilities include ASIC/SoC IP integration , linting, synthesis, and working closely with verification teams.Requires strong fundamentals in digital...
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RTL Design Engineer
4 days ago
Hyderabad, India ACL Digital Full timeJob Title: RTL Design EngineersExp Level: 2-3 yrsLoctaion: HyderabadJob Description:Seeking a motivated RTL Design Engineer to develop, integrate, and verify digital logic using Verilog/SystemVerilog .Responsibilities include ASIC/SoC IP integration , linting, synthesis, and working closely with verification teams.Requires strong fundamentals in digital...
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RTL Design Engineer
5 days ago
Hyderabad, India ACL Digital Full timeJob Title: RTL Design Engineers Exp Level: 2-3 yrs Loctaion: Hyderabad Job Description: Seeking a motivated RTL Design Engineer to develop, integrate, and verify digital logic using Verilog/SystemVerilog . Responsibilities include ASIC/SoC IP integration , linting, synthesis, and working closely with verification teams. Requires strong fundamentals in...
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RTL Design Engineer
3 days ago
Hyderabad, India ACL Digital Full timeJob Title: RTL Design Engineers Exp Level: 2-3 yrs Loctaion: Hyderabad Job Description: - Seeking a motivated RTL Design Engineer to develop, integrate, and verify digital logic using Verilog/SystemVerilog. - Responsibilities include ASIC/SoC IP integration, linting, synthesis, and working closely with verification teams. - Requires strong fundamentals in...
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RTL Design Engineer
5 days ago
Hyderabad, India ACL Digital Full timeJob Title: RTL Design EngineersExp Level: 2-3 yrsLoctaion: Hyderabad Job Description:Seeking a motivated RTL Design Engineer to develop, integrate, and verify digital logic using Verilog/SystemVerilog. Responsibilities include ASIC/SoC IP integration, linting, synthesis, and working closely with verification teams. Requires strong fundamentals in digital...
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RTL Design Engineer
3 days ago
Hyderabad, India ACL Digital Full timeJob Title: RTL Design EngineersExp Level: 2-3 yrsLoctaion: HyderabadJob Description:- Seeking a motivated RTL Design Engineer to develop, integrate, and verify digital logic using Verilog/SystemVerilog.- Responsibilities include ASIC/SoC IP integration, linting, synthesis, and working closely with verification teams.- Requires strong fundamentals in digital...
