
RTL Design Engineer
2 days ago
Job Title: RTL Design Engineers Exp Level: 2-3 yrs Loctaion: Hyderabad Job Description: Seeking a motivated RTL Design Engineer to develop, integrate, and verify digital logic using Verilog/SystemVerilog . Responsibilities include ASIC/SoC IP integration , linting, synthesis, and working closely with verification teams. Requires strong fundamentals in digital design , timing closure, and understanding of the ASIC flow. You'll debug simulation failures, implement ECOs, and support gate-level simulations. Collaborate with cross-functional teams (SW, DV, Physical Design) to achieve tapeout goals. Bachelor's or Master's degree in engineering in EE/CS is essential, along with 2-3 years of relevant experience. Share resumes to
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RTL Design Engineer
5 days ago
Hyderabad, India ACL Digital Full timeJob Title: RTL Design Engineers Exp Level: 4+ yrsLoctaion: HyderabadJob Description:• RTL coding knowledge• Top-level (SOC) level basic industry standard Arch knowledge• SoC & IP level Integration knowledge• IPXACT knowledge• IORING and Phys & GPIOs basic functionality• Design Partitioning(Tilification) knowledge• Design RTL quality...
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RTL Design Engineer
5 days ago
Hyderabad, India ACL Digital Full timeJob Title: RTL Design Engineers Exp Level: 4+ yrsLoctaion: Hyderabad /BangaloreJob Description:• RTL coding knowledge• Top-level (SOC) level basic industry standard Arch knowledge• SoC & IP level Integration knowledge• IPXACT knowledge• IORING and Phys & GPIOs basic functionality• Design Partitioning(Tilification) knowledge• Design RTL quality...
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RTL Design Engineer
4 days ago
Hyderabad, India ACL Digital Full timeJob Title: RTL Design Engineers Exp Level: 4+ yrsLoctaion: HyderabadJob Description:• RTL coding knowledge• Top-level (SOC) level basic industry standard Arch knowledge• SoC & IP level Integration knowledge• IPXACT knowledge• IORING and Phys & GPIOs basic functionality• Design Partitioning(Tilification) knowledge• Design RTL quality...
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RTL Design Engineer
3 days ago
Hyderabad, India ACL Digital Full timeJob Title: RTL Design Engineers Exp Level: 4+ yrsLoctaion: Hyderabad /BangaloreJob Description:• RTL coding knowledge• Top-level (SOC) level basic industry standard Arch knowledge• SoC & IP level Integration knowledge• IPXACT knowledge• IORING and Phys & GPIOs basic functionality• Design Partitioning(Tilification) knowledge• Design RTL...
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RTL Design Engineer
3 days ago
Hyderabad, India ACL Digital Full timePosition: RTL Design Engineer Experience: 5 - 8 YearsQualifications: BE/Btech in ECE/EEEResponsibilities -The candidate should have strong RTL design experience.Strong design experience in Ethernet IPs or Ethernet protocol domain.Knowledge in Verilog/VHDL languagesScripting languages: TCL/Perl/Python (any one).Knowledge of AXI Protocols.
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Rtl design engineer
4 weeks ago
Hyderabad, India ACL Digital Full timeExperience Level:5+ years of RTL design and development Location: Hyderabad/Bangalore Job Description: Silicon Design Engineer Basic Job Deliverable: Silicon Design Engineer (RTL Design and Development) o Responsible for RTL design and development o Responsible for generating documents, such as requirements specification, design, user-guide, etc., o...
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RTL Design Engineer
3 days ago
Hyderabad, India ACL Digital Full timeJob Title - RTL Design Engineers Exp Level: 4+ yrsLoctaion: Hyderabad /BangaloreJob Description:• RTL coding knowledge• Top-level (SOC) level basic industry standard Arch knowledge• SoC & IP level Integration knowledge• IPXACT knowledge• IORING and Phys & GPIOs basic functionality• Design Partitioning(Tilification) knowledge• Design RTL...
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RTL Design Engineer
1 week ago
Hyderabad, Telangana, India ACL Digital Full time ₹ 4,00,000 - ₹ 12,00,000 per yearRTL Design EngineerSkill: ASIC RTL Design with LINT, CDC. Experience: 1 to 3 Years Notice Period: Immediate to 15 days Share your updated resume now.
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RTL Design Engineer
1 week ago
hyderabad, India ACL Digital Full timePosition: RTL Design Engineer Experience: 5 - 8 Years Qualifications: BE/Btech in ECE/EEE Responsibilities - The candidate should have strong RTL design experience. Strong design experience in Ethernet IPs or Ethernet protocol domain. Knowledge in Verilog/VHDL languages Scripting languages: TCL/Perl/Python (any one). Knowledge of AXI Protocols.
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RTL Design Engineer
6 days ago
Hyderabad, India ACL Digital Full timePosition: RTL Design Engineer Experience: 5 - 8 Years Qualifications: BE/Btech in ECE/EEE Responsibilities - The candidate should have strong RTL design experience. Strong design experience in Ethernet IPs or Ethernet protocol domain. Knowledge in Verilog/VHDL languages Scripting languages: TCL/Perl/Python (any one). Knowledge of AXI Protocols.