Lead DV Engineer

Exciting Opportunities in Taras System and Solutions Designation: Lead Engineer (DV) Experience: 10+ years Notice Period: Immediate to 30 days Roles and Responsibilities: JD for DV engineers (10-15 years of experience) - SOC Verification Experience on ARM Ecosystem Test cases Experience in C and C++ - PCIE Experience and also PCIE-VIP usage experience - GLS...

Company Qualcomm India Private LimitedJob Area Engineering Group Engineering Group Hardware EngineeringGeneral Summary As a leading technology innovator Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drives digital transformation to help create a smarter connected future for all As a Qualcomm Hardware...

LTTS is hiring for Design Verification Engineers with 5+ Years of experience.Job Location : Bangalore, IndiaDetailed JD is as below ::Job Description DV Positions:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-stem/SoC level verificationDevelop functional tests based on verification test planDrive Design...

LTTS is looking for DV engineers with 7+ years of experience for lead role...detailed JD is below mentioned.8/10+ of hands-on experience in StemVerilog/UVM methodology and/or C/C++ based verification8/ 10+ experience in IP/sub-stem and/or SoC level verification based on StemVerilog UVM/OVM based methodologiesExperience in development of UVM based...

LTTS is hiring for Design Verification Engineers with 5+ Years of experience.Job Location : Bangalore, IndiaDetailed JD is as below ::Job Description DV Positions:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-stem/SoC level verificationDevelop functional tests based on verification test planDrive Design...

LTTS is looking for DV engineers with 7+ years of experience for lead role...detailed JD is below mentioned. 8/10+ of hands-on experience in StemVerilog/UVM methodology and/or C/C++ based verification 8/ 10+ experience in IP/sub-stem and/or SoC level verification based on StemVerilog UVM/OVM based methodologies Experience in development of UVM based...

LTTS is looking for DV engineers with 7+ years of experience for lead role...detailed JD is below mentioned. 8/10+ of hands-on experience in StemVerilog/UVM methodology and/or C/C++ based verification 8/ 10+ experience in IP/sub-stem and/or SoC level verification based on StemVerilog UVM/OVM based methodologies Experience in development of UVM based...

Who are we and what do we do? The HVP team in TI develops power solutions for a wide array of end-equipments, with several hundreds of volts of withstand capability. This team in TI offers one of the world's largest comprehensive portfolios of high-performance AC/DC and isolated DC/DC controllers, GaN-integrated power-stages and converters, and modules with...

Job Title: Urgent Search for Peripheral DVWe are seeking a skilled and experienced Digital Verification Engineer to lead the development of peripheral DV.">The successful candidate will be responsible for:Developing test plans and designs for pre-silicon verification of peripheralsCreating and maintaining accurate and detailed documentation of verification...

Who are we and what do we do? The HVP team in TI develops power solutions for a wide array of end-equipments, with several hundreds of volts of withstand capability. This team in TI offers one of the world's largest comprehensive portfolios of high-performance AC/DC and isolated DC/DC controllers, GaN-integrated power-stages and converters, and modules with...