
NoC Verification Engineer
4 days ago
NoC Verification Engineer
Experience: 7 to 14 Years
Key Responsibilities:
Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.
Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.
Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and UCIe connected via NoC.
Model and validate credit-based flow control, packet routing, QoS, and virtual channel behavior.
Perform assertion-based verification (SVA/DVL) for protocol compliance and corner cases.
Debug complex interactions at simulation or emulation level, including deadlocks, congestion, or ordering violations.
Work closely with architects and RTL teams to align verification coverage and performance metrics.
Perform coverage closure (code + functional) and ensure complete verification sign-off.
Required Skills:
Strong experience with SystemVerilog, UVM, and object-oriented testbench development.
In-depth knowledge of NoC protocols (AXI4, CHI, TileLink, or proprietary NoC).
Verification experience with coherent interconnects, cacheable traffic, and memory subsystem validation.
Familiarity with Synopsys, Cadence, or Siemens verification tools (VCS/Xcelium/Questa).
Familiarity with formal verification, assertions (SVA/PSL), and coverage metrics.
Ability to debug low-level issues using waveform analysis, scoreboards, and transactors.
Familiarity with multi-core CPU, DSP, or GPU interconnect systems is a plus.
Location: Bangalore
About Company:
ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.
-
NoC Verification Engineer
2 weeks ago
Bengaluru, Karnataka, India ACL Digital Full timeNoC Verification EngineerExperience: 7 to 14 YearsKey Responsibilities:Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and...
-
NoC Verification Engineer
1 week ago
Bengaluru, Karnataka, India ACL Digital Full timeNoC Verification Engineer Experience: 7 to 14 Years Key Responsibilities: Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics. Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic. Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe,...
-
NoC Verification Engineer
3 days ago
Bengaluru, Karnataka, India ACL Digital Full time ₹ 1,04,000 - ₹ 1,30,878 per yearNoC Verification EngineerExperience: 7 to 14 YearsKey Responsibilities:Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and...
-
NoC Verification Engineer
2 weeks ago
Bengaluru, Karnataka, India ACL Digital Full timeNoC Verification EngineerExperience : 7 to 14 YearsKey Responsibilities:Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and...
-
Design Verification Engineer – NoC
7 days ago
Bengaluru, Karnataka, India Eduplex services private limited Full time ₹ 15,00,000 - ₹ 30,00,000 per yearDesign Verification Engineer – NoC / VLSI (Product-Based Only)Location: Bangalore, KarnatakaJob Type: Full-TimeSalary: ₹15 – 30 LPA (Depending on Experience)Experience Required: 5 – 12 Years (Only from Product-Based Companies)Job OverviewWe are seeking an experienced Design Verification Engineer with strong expertise in NoC (Network-on-Chip) and VLSI...
-
Senior Verification Engineer
6 days ago
Bengaluru, Karnataka, India beBeeVerification Full time ₹ 1,04,000 - ₹ 1,30,878About the RoleWe are seeking an experienced NOC/IP Design Verification Lead Engineer to join our team.The ideal candidate will have a strong background in verification and testing of complex systems, with a focus on Network-on-Chip (NOC) designs.This is a challenging role that requires technical expertise, leadership skills, and effective communication...
-
NOC/IP-Design Verification Lead Engineer
2 weeks ago
Bengaluru, Karnataka, India ACL Digital Full timeExp: 8+ YearsLocation: BangaloreJD:Key Responsibilities:· Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.· Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.· Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and UCIe...
-
NOC/IP-Design Verification Lead Engineer
1 week ago
Bengaluru, Karnataka, India ACL Digital Full timeExp: 8+ Years Location: Bangalore JD: Key Responsibilities: · Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics. · Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic. · Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and...
-
NOC/IP-Design Verification Lead Engineer
6 days ago
Bengaluru, Karnataka, India ACL Digital Full time ₹ 15,00,000 - ₹ 25,00,000 per yearExp: 8+ YearsLocation: BangaloreJD:Key Responsibilities:· Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.· Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.· Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and UCIe...
-
NOC/IP-Design Verification Lead Engineer
5 days ago
Bengaluru, Karnataka, India ACL Digital Full timeExp: 8+ YearsLocation: BangaloreJD:Key Responsibilities:· Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.· Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.· Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and UCIe...