
Design Verification
2 weeks ago
PCIe Verification: Lead the verification of PCIe (PCI Express) interface designs, ensuring compliance with PCIe protocol standards (e.g., PCIe Gen 3/4/5/6, USB3, etc.).
Testbench Development: Develop and implement scalable, reusable, and efficient testbenches for PCIe designs using SystemVerilog, UVM (Universal Verification Methodology), and other industry-standard verification methodologies.
Protocol Compliance: Ensure that the PCIe designs conform to PCIe protocol specifications, including transaction layers, link training, error handling, and power management.
Verification Plan Creation: Create detailed verification plans for PCIe designs based on specifications and requirements, ensuring full coverage and correctness of the design.
Simulation & Debugging: Perform simulations and debugging using tools like Questa, VCS, or ModelSim to identify design issues. Use advanced debugging techniques, including waveform analysis and code coverage, to ensure design correctness.
Regression Testing: Set up and manage regression testing for continuous validation of PCIe functionality, tracking and resolving any failures.
Verification Coverage: Ensure thorough verification of all design corner cases, including protocol edge cases, power states, and interoperability scenarios. Achieve high coverage metrics (code, functional, and protocol coverage).
Formal Verification: Implement and use formal verification techniques to ensure correctness of the most critical PCIe components, such as link establishment, transaction layer, and error recovery mechanisms.
-
Verification Lead Design Engineer
3 weeks ago
Bengaluru, Karnataka, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...
-
Verification Lead Design Engineer
2 weeks ago
Bengaluru, Karnataka, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...
-
Sr verification principal design engineer
2 weeks ago
Bengaluru, Karnataka, India Cadence System Design And Analysis Full timePosition Description:Design Verification role for IP development team.B. Tech/M. Tech with 10+ years of relevant experience.Position is based in Bangalore/Noida, part of Cadence IP Group.Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3 C)UVM testbench development to build a...
-
Sr Verification Principal Design Engineer
2 weeks ago
Bengaluru, Karnataka, India Cadence System Design and Analysis Full timePosition Description: Design Verification role for IP development team. B. Tech/M.Tech with 10+ years of relevant experience. Position is based in Bangalore/Noida, part of Cadence IP Group. Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C) UVM testbench development to...
-
Sr Verification Principal Design Engineer
2 weeks ago
Bengaluru, Karnataka, India Cadence System Design and Analysis Full timePosition Description:Design Verification role for IP development team.B. Tech/M.Tech with 10+ years of relevant experience.Position is based in Bangalore/Noida, part of Cadence IP Group.Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C)UVM testbench development to build a...
-
Design Verification
3 weeks ago
Bengaluru, Karnataka, India ACL Digital Full timeRISC-V Verification: Lead the verification of RISC-V processor cores, ensuring compliance with the RISC-V ISA specifications (e.g., RV32/64/128, Privileged Architecture, Custom Extensions).Testbench Development: Design, implement, and maintain reusable, scalable, and efficient testbenches using SystemVerilog, UVM (Universal Verification Methodology), and...
-
Design Verification
2 weeks ago
Bengaluru, Karnataka, India ACL Digital Full timeRISC-V Verification: Lead the verification of RISC-V processor cores, ensuring compliance with the RISC-V ISA specifications (e.g., RV32/64/128, Privileged Architecture, Custom Extensions).Testbench Development: Design, implement, and maintain reusable, scalable, and efficient testbenches using SystemVerilog, UVM (Universal Verification Methodology), and...
-
Design Verification Engineer
2 weeks ago
Bengaluru, Karnataka, India Tessolve Full time### Job Description: ASIC Design Verification Engineer **Location:** - Bangalore, Chennai, Hyderabad, Noida,Malaysia, Germany. **Experience Range:** 5 to 20+ years **Key Responsibilities:** - Develop and execute test plans to verify complex ASIC designs. - Utilize System Verilog (SV) and UVM methodologies for verification tasks. - Perform functional,...
-
Design Verification Lead
2 weeks ago
Bengaluru, Karnataka, India beBeeVerification Full time ₹ 20,00,000 - ₹ 25,00,000Our company is seeking a seasoned Design Verification engineer to lead their team.Key Responsibilities:Develop verification plans and build test benches to enable IP/sub-stem/SoC level verification.Create functional tests based on verification test plans.Drive design verification to closure based on defined verification metrics, including test plan,...
-
Design Verification Lead
3 weeks ago
Bengaluru, Karnataka, India L&T Technology Services Full timeL&T Technology services is looking to hire for Design Verification Engineers for Lead Role. Job Location : Bangalore Experience : 7-10 Years Job details are as below ::Job Description DV Positions: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-stem/SoC level verification Develop functional tests based on...