Design and verification Lead
3 days ago
Advance your career with Leadsoc Technologies
Position : Design Verification Leaders
Experience : 6-14 years
· Individual contributor role with ability to perform assigned DV tasks independently
- IP Verification
- SOC Verification
- Functional Verification
- System Verilog
- UVM
Please share your profile to jhansi.bv@leadsoc.com for further discussion or refer your colleagues for the same.
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