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RTL Design Lead

7 months ago


Greater Bengaluru Area, India Mulya Technologies Full time

RTL Design Lead

Location: Bangalore

As an RTL design lead, you will play a key role in the design and development of complex ASICs and System-on-Chip architectures for various electronic devices. You will be responsible for RTL design, establishing good design practices, translating micro-architecture to efficient RTL, optimizing performance, power efficiency, and area constraints while ensuring compatibility with system-level requirements. You will also need to define and validate analog-digital interfaces.


Responsibilities:

  • Work with architecture and physical design teams to code power/area/performance optimized RTL.
  • Participate in verification at block and chip level
  • Run Lint, CDC/RDC, LEC checks
  • Develop block and chip level constraints and run synthesis


Qualifications:

  • Bachelor's, Master's, or Ph.D. degree in Electrical Engineering with 12-15 years of industry experience
  • Proficiency in hardware description languages (Verilog, VHDL) and microarchitecture modeling tools (SystemVerilog, SystemC).
  • Experience with SoC design methodologies, including RTL design, synthesis, timing analysis.
  • Ability to self-verify RTL blocks/top level before handing off to the DV team is necessary.
  • Exposure to Analog digital interfaces and physical layer development for standards like ehternet, USB3, MIPI is highly preferred.
  • Exposure to STA, DFT and physical design is highly preferred.
  • Excellent communication and teamwork skills. Should be a self-starter and a highly motivated individual contributor.



Contact:

Uday

Mulya Technologies

muday_bhaskar@yahoo.com

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