Physical Design Engineer
3 weeks ago
***Note: We highly appreciate your interest in this position of HCLTech Vietnam. After reviewing all applications, only qualified candidates will be contacted for the next steps within 15 days from date of submission
ABOUT HCL VIETNAM COMPANY LIMITED
HCL Vietnam Company Limited belongs to HCLTech.
HCLTech is a global technology company, home to more than 218,000 people across 59 countries, delivering industry-leading capabilities centered around digital, engineering, Cloud and AI, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Consolidated revenues as of 12 months ending September 2024 totaled $13.7 billion. To learn how we can supercharge progress for you, visit https://www.hcltech.com/
Working location: Ha Noi / Ho Chi Minh city (Vietnam)
DUTY & RESPONSIBILITIES
- To be responsible for managing technology in projects and providing technical guidance / solutions for work completion.
- To be responsible for providing technical guidance / solutions.
- To develop and guide the team members in enhancing their technical capabilities and increasing productivity.
- To ensure process compliance in the assigned module| and participate in technical discussions/review.
- To prepare and submit status reports for minimizing exposure and risks on the project or closure of escalations
MAIN REQUIREMENTS
- Professional experience of executing physical design projects for up to 6 years
- Proven ability in technically leading a small team or mentoring juniors would be preferred
- Hands on experience on the entire PD Flow from RTL to GDSII
- Should have good understanding of Floor planning, Power Planning, Placement & Optimization, CTS, Routing, Design Convergence and Sign-off with in depth expertise in at least one of these domains
- Working knowledge about OCV, MM/MC optimization and multi power designs (Level shifters, Isolation cells etc)
- Exposure to static timing analysis fixes including automated ECO generation
- Strong in areas on CTS and skew fixing
- Library preparation in any environment (Synopsys, Cadence etc)
- Working knowledge on Physical verifications tasks at lower nodes (data base merging/DRC/LVS/ERC/PERC/Antenna/ESD/LUP analysis/fixing) at block level/chip level
- Job would require complete ownership from netlist/RTL to GDS for blocks at Block level OR full chip level
- Exposure to IP Hardening for blocks like SERDES, USB PHY, MIPI, SATA will be an added advantage
- Working knowledge of scripting language like Perl, TCL will be considered a plus
- Candidate needs to be self-driven and confident in reporting out status and sharing technical results with customers
- Be able to use English in working communication
BENEFIT
- 18 paid leaves per year (including 12 annual leaves + 6 personal leaves).
- Insurance plan based on full salary + 13th salary + Performance Bonus.
- 100% full salary in probation period.
- Medical Benefit (Personal) and Family based on levels.
- Working in a fast paced, flexible, and multinational working environment. Chance to travel onsite (in 49 countries).
- Internal Training (Technical & Functional). Scope of English Training.
- Working from Mondays to Fridays.
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