Senior Engineer, Mask Design

1 month ago

Hyderabad, India Micron Full time

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

JR54029 Senior Engineer, Mask Design & Tapeout Solutions

As a Non-Volatile Engineering (NVE) Product Engineer working in the Mask Design & Tapeout Solutions team at Micron Technology, Inc., you are part of a team committed to quality, efficient NAND Memory Design through Custom Layout Design and Tapeout Management.

Layout & Mask Designer

In our team, we support New Design Development and own the Design Revisions through the Product Lifecycle. As an expert Mask Design Engineer, you will apply DFM, Process Input and Fab Feedback while engaging in multi-functional teams. You will be committed to driving yield improvements, building new processes and tools and mitigating reliability fails through innovative Layout Design techniques. As an owner of the Design Library, you will build, verify and manage all Design Revisions. You will also mentor and train new Engineers and assist partner teams with Design Debug.

Tapeout Solutions

Our team also owns and supports the Tapeout Process of all Production Reticles for NAND Memory Designs. As such, you will craft and maintain Design Edit Documentation, contribute to Design Reviews and own Reticle Compatibility definitions for Fabs. In this role, you will work with various Engineering and Manufacturing groups to prioritize projects and coordinate resources to ensure critical schedules are met.

Responsibilities include:

Layout Mask Design

Design, Implement and Drive Layout edits needed for development, yield improvement, quality and process enablement. Run (DFM) Flows and collaborate with Design & Technology Development and to craft and implement solutions.

Design Library Management & Tapeout

Build, Validate and Handle New Design Libraries and Final archives. Accountable for Final EDA checks (LVS, DRC, LVL) Generate Final Data and manage post-processing tapeout flows and Validate final mask data Lead Tapeout order paperwork and Coordinate with Partner Teams to ensure alignment of needs, expectations, priorities and resources to hit schedules.

Who We Are

We strive for a team culture where you are empowered to develop your skills and have a meaningful impact We believe in enabling opportunity for you to explore interests that contribute to the team and your career. We prioritize having fun and care about and support each other

Who You Are

You believe in driving continuous improvement. You are an Engineer who is passionate about learning new things as well as creating and innovating. You are tenacious and motivated by new challenges. You enjoy mentoring and training others.

Your Skills: 3 + Years Experience in Layout Design / Design Library Management & Tapeout Solutions

Self-motivated and driven with a Growth Mindset Excellent problem solving and analytical skills Strong multitasking, organizational and project management skills Knowledge of Semiconductor Processing including Photolithography Strong understanding of Semiconductor Physics and VLSI techniques Strong Communication skills in written and spoken English Exposure to EDA Tools

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