Design verification Engineer

1 month ago


Bhubaneswar, India ARF Full time
D o : Design VerificationEngineer : 5Years :Bangalore/Bhubaneswar ::
  • Develop and execute verificationplans for complex RTL designs.
  • Performfunctional and performance verification of designblocks.
  • Collaborate with crossfunctional teamsto ensure successful IP componentintegration.
  • Contribute to enhancingverification methodologies and bestpractices.
:Bachelors or masters degree in electricalengineering/Electronics & Communication Engineering orrelated field. :: Minimum of 5 yearsof experience in RTL designverification.Proficiency in Verilog/ SystemVerilog and experience with industrystandard verificationmethodologies (OVM/UVM).Strong understandingof ASIC design flow and verificationtechniques.Excellent problemsolving anddebugging skills. :
  • Experiencewith formal verification tools andmethodologies.
  • Familiarity with scriptinglanguages (e.g. Python Perl) for automationtasks.
  • Knowledge of industrystandard protocolsand interfaces (e.g. PCIe AXIAHB).
i :
  • Opportunities for professionalgrowth and career advancement.
  • Vibrant andinclusive work culture that values collaboration andinnovation.
If youre ready to take your career to thenext level and contribute to groundbreaking projects we want tohear from you / : Please name thefile in the following format: Your Full.

design,verilog,rtldesign,communication,universal verification methodology(uvm),semiconductor device



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