Principal Design Engineer

5 months ago

Pune, India Lattice Semiconductor Full time

Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Responsibilities & Skills

Lattice is seeking candidates for the position of Principal Design Engineer.

Role specifics:

This is a full-time executive leader position located in Pune, India. The position will be managed by the HW site lead in Pune. This leader will manage a global physical design organization that contributes not only to FPGA programs in Pune but also to efforts worldwide. The successful candidate will be open and willing to both (a) teach best-known-methods to an existing FPGA team and (b) learn from the team about the particular complications of highly programmable FPGA fabrics. This role carries the need to be both a strong educator and an open-minded student.

Accountabilities:

Drive worldwide team of physical designers to deliver. PD of ASIC blocks on the FPGA (., DDR PHY, configuration and security engines, interface wrappers around serdes PMAs, Best-in-class methodologies to accelerate design time and improve design quality. Expand ASIC methodologies into FPGA fabrics to accelerate team velocity. Strive to constantly improve internal flows and methodologies. Develop strong relationships with worldwide teams. Mentor and develop a strong bench. Travel occasionally as needed.

Qualifications:

BS/MS/PhD Electrical Engineering, Computer Science, Computer systems degree or equivalent. 20+ years of experience in leading physical design teams, including managing team schedules and deliverables and meeting project milestones. Embraces and thrives in ambiguity, changing priorities, and evolving market conditions. A world-class expert in physical design flows (Innovus or ICC2 or both). Familiarity with FPGA designs, use-cases, and design considerations is a plus. Independent worker with demonstrated problem-solving abilities. Proven ability to work with multiple groups across different sites and timezones.

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