Director, Front-End Design
6 months ago
Job Description
Responsibilities include resource management, project scheduling, execution, and setting high-level technical vision. Projects span a variety of business lines, and designs will need to meet a wide range of power/performance/area goals, depending on the product. Engagement and collaboration across global sites is a key aspect of this role as alignment of methods is essential and sharing of resources is common. Strong technical, communication, and consensus building skills will be required as well as a demonstrated ability to influence solutions across a global organization. The ideal candidate will partner with local and global SoC teams to drive best practices with a target of productivity improvement.
Lead Soc RTL and Verification R&D team driving technical execution and best in class methodologies used in the design of advanced microcontrollers and microprocessors. In this role you will also lead and build this high performance SoC RTL team, including training and mentoring NCG’s and developing next level verification leads Fully own RTL delivery for a multitude of projects Work closely with system architects to define high level specifications that are implementable and robust. Interface with verification/validation teams to ensure design quality and robustness. Work with various EDA vendors to deploy next generation tools Build strong collaboration with other R&D teams such as Verification, digital IP, Design Enablement, Emulation, and Validation to achieve project milestones Promote continuous improvement to design techniques to ensure ‘Zero Defect’ chips Collaborate with SME’s and key leaders in architecture, systems, emulation, SoC design, software, physical design, and IP teams developing key technical networks to influence overall design improvements and verification methodologies Complete ownership for SoC verification quality sign-offs ensuring all deliverables for team hand-offs. Participate in customer engagements assessing quality and risksKey Challenges:
This role requires close collaboration across global teams for resolving SoC RTL methodology alignment, the leadership role needs to be strongly integrated locally as well as globally in order to make the right trade-offs in methodology and project execution This role with have direct impact on product execution for business lines, responsible for schedule, cost and quality commitments in SoC verification as well as identifying key improvements and ROI across the entire development processCross functional aspects:
VP and Directors in IP development to plan strategic SoC dependencies, roadmaps and methodologies and strategic IP innovations Chief Architects and Engineers for developing SoC Verification strategic roadmaps and managing execution deliverables from SoC Verification team Directors in implementation, Verif, DFT, Emulation to collaborate on project development plans and execution and develop common methodologiesQualifications
Degree in Electrical Engineering or Computer Science, with 15+ years of experience on IP/Sub-System RTL Design .Candidate should be an experienced manager with a history of leading successful SoC RTL teams. Proven experience in testbench design and development using UVM methodology for IP/Subsystem and SOC. Experience in Microcontroller and Microprocessor architecture, Interconnect, Cache Coherency. Experience in protocols like AHB/AXI/CHI, Memory (ROM, RAM, Flash, LPDDR/DDR3/4) and memory controllers. Advanced knowledge of Verilog, System Verilog, C/C++, Shell. Good knowledge in scripting like Perl, TCL or Python is a plus High proficiency in Metric Driven Verification concepts, functional and code coverage. Expertise in directed and constrained random methodologies. Good knowledge of formal verification methodologies and assertions. Experience with debugging of designs pre- and post-silicon, in simulation and on the bench. Excellent written and verbal communication skill. Experience with System Verilog and front-end tooling (simulation, waveform viewers, lint, CDC, RDC, etc.) is required, as well as highly efficient FE methodologies. Must have worked on complex, multi-core SoC’s with extensive interconnects and a large range of peripherals. Strong domain knowledge of clocking, system modes, power management, debug, security and other architectures is a must. Any of following experience would be a plus: High Speed Peripherals like DDR, PCIe, Ethernet, GPU, VPU (Video Processing Unit); NIC/FlexNOC interconnect; Flash memory subsystems. Must have strong track record of managing RTL design through several successful tapeouts.
Company Description
Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.
Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.
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